PSOC4200M Datasheet, PDF (11/42 Pages) Cypress Semiconductor – Programmable System-on-Chip

PSoC^® 4: PSoC 4200M Family
Datasheet
68-QFN
Pin
Name
8
P2.6
9
P2.7
10
VSSA
11
VDDA
12
P6.0
13
P6.1
14
P6.2
15
P6.3
16
P6.4
17
P6.5
18
VSSIO
19
P3.0
20
P3.1
21
P3.2
22
P3.3
23
P3.4
24
P3.5
25
P3.6
26
P3.7
27
VDDIO
28
P4.0
29
P4.1
30
P4.2
31
P4.3
32
P4.4
33
P4.5
34
P4.6
35
P4.7
39
P7.0
40
P7.1
41
P7.2
64-TQFP
Pin
Name
8
P2.6
9
P2.7
10
VSSA
11
VDDA
12
P6.0
13
P6.1
14
P6.2
15
P6.4
16
P6.5
17
VSSIO
18
P3.0
19
P3.1
20
P3.2
21
P3.3
22
P3.4
23
P3.5
24
P3.6
25
P3.7
26
VDDIO
27
P4.0
28
P4.1
29
P4.2
30
P4.3
31
P4.4
32
P4.5
33
P4.6
37
P7.0
38
P7.1
48-TQFP
Pin
Name
8
P2.6
9
P2.7
10
VSSD
10
VSSD
12
P3.0
13
P3.1
14
P3.2
16
P3.3
17
P3.4
18
P3.5
19
P3.6
20
P3.7
21
VDDIO
22
P4.0
23
P4.1
24
P4.2
25
P4.3
26
P7.0
27
P7.1
44-TQFP
Pin
Name
8
P2.6
9
P2.7
10
VSSD
10
VSSD
11
P3.0
12
P3.1
13
P3.2
14
P3.3
15
P3.4
16
P3.5
17
P3.6
18
P3.7
19
VDDD
20
P4.0
21
P4.1
22
P4.2
23
P4.3
The pins of Port 6 are overvoltage-tolerant. Pins 36, 37, and 38 are No-Connects on the 68-pin QFN. Pins 34, 35, and 36 are
No-Connects on the 64-pin TQFP. Pins 11 and 15 are No-connects in the 48-pin TQFP. All VSS pins must be tied together.
The output drivers of I/O Ports P0 and P7 are connected to VDDD. Output drivers of I/O Ports 1, 2, and 5 are connected to VDDA.
Output drivers of I/O Ports 3, 4, and 6 are connected to VDDIO.
Document Number: 001-93963 Rev. *G
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