PSOC4200M Datasheet, PDF (31/42 Pages) Cypress Semiconductor – Programmable System-on-Chip

PSoC^® 4: PSoC 4200M Family
Datasheet
Table 39. UDB AC Specifications
(Guaranteed by Characterization) (continued)
Spec ID
Parameter
Description
Min Typ
SID251
F_{MAX_CRC}
Max frequency of 16-bit CRC/PRS –
–
in a UDB pair
PLD Performance in UDB
SID252
F_{MAX_PLD}
Max frequency of 2-pass PLD
function in a UDB pair
Clock to Output Performance
–
–
SID253
T_{CLK_OUT_UDB1}
Prop. delay for clock in to data out
–
15
at 25 °C, Typ.
SID254
T_{CLK_OUT_UDB2}
Prop. delay for clock in to data out,
–
25
Worst case.
Max
48
48
–
–
Units Details/Conditions
MHz
MHz
ns
ns
Table 40. Block Specs
Spec ID
Parameter
SID256* T_WS48*
SID257
T_WS24*
SID260
V_REFSAR
Description
Number of wait states at 48 MHz
Number of wait states at 24 MHz
Trimmed internal reference to SAR
SID261
F_SARINTREF
SAR operating speed without
external reference bypass
SID262
T_CLKSWITCH
Clock switching from clk1 to clk2 in
clk1 periods
* Tws48 and Tws24 are guaranteed by Design
Min Typ
2
–
1
–
–1
–
–
–
3
–
Max Units Details/Conditions
–
CPU execution from
Flash
–
CPU execution from
Flash
+1
% Percentage of Vbg
(1.024 V).
Guaranteed by
characterization
100
ksps 12-bit resolution.
Guaranteed by
characterization
4
Periods . Guaranteed by
design
Table 41. UDB Port Adaptor Specifications
(Based on LPC Component Specs, Guaranteed by Characterization -10-pF load, 3-V V_DDIO and V_DDD)
Spec ID
Parameter
Description
Min Typ Max Units
SID263
SID264
T_LCLKDO
T_DINLCLK
LCLK to output delay
Input setup time to LCLCK rising
edge
–
–
18
ns
–
–
7
ns
SID265
T_DINLCLKHLD
Input hold time from LCLK rising edge 0
–
–
ns
SID266
T_LCLKHIZ
LCLK to output tristated
–
–
28
ns
SID267
T_FLCLK
LCLK frequency
–
–
33
MHz
SID268
T_LCLKDUTY
LCLK duty cycle (percentage high)
40
–
60
%
Details/Conditions
Table 42. CAN Specifications
SPEC ID#
Parameter
SID420
IDD_CAN
SID421
CAN_bits
Description
Block current consumption
CAN Bit rate (Min 8-MHZ clock)
Min Typ Max Units Details /Conditions
–
–
200
uA
–
–
1
Mbps
Document Number: 001-93963 Rev. *G
Page 31 of 42