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PSOC4200M Datasheet, PDF (19/42 Pages) Cypress Semiconductor – Programmable System-on-Chip
PSoC® 4: PSoC 4200M Family
Datasheet
Table 4. GPIO DC Specifications (continued)
Spec ID# Parameter
Description
Min Typ
SID68
SID69
SID69A
VHYSCMOS
Input hysteresis CMOS
0.05 ×
–
VDDD
IDIODE
Current through protection diode to
–
–
VDD/Vss
ITOT_GPIO
Maximum Total Source or Sink Chip
–
–
Current
Max Units Details/Conditions
–
mV
100
µA Guaranteed by
characterization
200
mA Guaranteed by
characterization
Table 5. GPIO AC Specifications
(Guaranteed by Characterization)[3]
Spec ID# Parameter
Description
Min Typ Max Units Details/Conditions
SID70
TRISEF
Rise time in fast strong mode
2
–
12
ns 3.3 V VDDD,
Cload = 25 pF
SID71
TFALLF
Fall time in fast strong mode
2
–
12
ns 3.3 V VDDD,
Cload = 25 pF
SID72
TRISES
Rise time in slow strong mode
10
–
60
ns 3.3 V VDDD,
Cload = 25 pF
SID73
TFALLS
Fall time in slow strong mode
10
–
60
ns 3.3 V VDDD,
Cload = 25 pF
SID74
FGPIOUT1
GPIO Fout;3.3 V  VDDD 5.5 V. Fast
–
strong mode.
–
33
MHz 90/10%, 25-pF load,
60/40 duty cycle
SID75
FGPIOUT2
GPIO Fout;1.7 VVDDD3.3 V. Fast
–
strong mode.
–
16.7
MHz 90/10%, 25-pF load,
60/40 duty cycle
SID76
FGPIOUT3
GPIO Fout;3.3 V VDDD 5.5 V.
Slow strong mode.
–
–
7
MHz 90/10%, 25-pF load,
60/40 duty cycle
SID245
FGPIOUT4
GPIO Fout;1.7 V VDDD 3.3 V.
Slow strong mode.
–
–
3.5
MHz 90/10%, 25-pF load,
60/40 duty cycle
SID246
FGPIOIN
GPIO input operating frequency;
1.71 V VDDD 5.5 V
–
–
48
MHz 90/10% VIO
XRES
Table 6. XRES DC Specifications
Spec ID# Parameter
Description
Min Typ Max Units
Details/
Conditions
SID77
SID78
SID79
SID80
SID81
VIH
VIL
RPULLUP
CIN
VHYSXRES
Input voltage high threshold
Input voltage low threshold
Pull-up resistor
Input capacitance
Input voltage hysteresis
0.7 ×
–
–
VDDD
–
–
0.3 ×
VDDD
3.5
5.6
8.5
–
3
–
–
100
–
V CMOS Input
V CMOS Input
kΩ
pF
mV Guaranteed by
characterization
SID82
IDIODE
Current through protection diode to
–
VDDD/VSS
–
100
µA Guaranteed by
characterization
Table 7. XRES AC Specifications
Spec ID# Parameter
Description
Min
Typ
Max Units
Details/
Conditions
SID83
TRESETWIDTH Reset pulse width
1
–
–
µs Guaranteed by
characterization
Note
3. Simultaneous switching transitions on many fully-loaded GPIO pins may cause ground perturbations depending on several factors including PCB and decoupling
capacitor design. For applications that are very sensitive to ground perturbations, the slower GPIO slew rate setting may be used.
Document Number: 001-93963 Rev. *G
Page 19 of 42