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PSOC4200M Datasheet, PDF (12/42 Pages) Cypress Semiconductor – Programmable System-on-Chip
PSoC® 4: PSoC 4200M Family
Datasheet
Each of the pins shown in the previous table can have multiple programmable functions as shown in the following table. Column headings refer to Analog and Alternate pin
functions.:
Port/Pin
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
P5.0
P5.1
P5.2
P5.3
Analog
lpcomp.in_p[0]
lpcomp.in_n[0]
lpcomp.in_p[1]
lpcomp.in_n[1]
wco_in
wco_out
ctb1.oa0.inp
ctb1.oa0.inm
ctb1.oa0.out
ctb1.oa1.out
Alt. Function 1
ext_clk:0
tcpwm.line[4]:2
tcpwm.line_compl[4]:2
tcpwm.line[5]:2
tcpwm.line_compl[5]:2
P5.4
P5.5
P5.6
P5.7
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
ctb1.oa1.inm
ctb1.oa1.inp
ctb1.oa0.inp_alt
ctb1.oa1.inp_alt
ctb0.oa0.inp
ctb0.oa0.inm
ctb0.oa0.out
ctb0.oa1.out
ctb0.oa1.inm
ctb0.oa1.inp
ctb0.oa0.inp_alt
ctb0.oa1.inp_alt
sarmux.0
sarmux.1
sarmux.2
sarmux.3
sarmux.4
sarmux.5
sarmux.6
tcpwm.line[6]:2
tcpwm.line_compl[6]:2
tcpwm.line[7]:0
tcpwm.line_compl[7]:0
tcpwm.line[2]:1
tcpwm.line_compl[2]:1
tcpwm.line[3]:1
tcpwm.line_compl[3]:1
tcpwm.line[6]:1
tcpwm.line_compl[6]:1
tcpwm.line[7]:1
tcpwm.line_compl[7]:1
tcpwm.line[4]:1
tcpwm.line_compl[4]:1
tcpwm.line[5]:1
tcpwm.line_compl[5]:1
tcpwm.line[0]:1
tcpwm.line_compl[0]:1
tcpwm.line[1]:1
Document Number: 001-93963 Rev. *G
Alt. Function 2
scb[1].uart_rx:0
scb[1].uart_tx:0
scb[1].uart_cts:0
scb[1].uart_rts:0
scb[2].uart_rx:0
scb[2].uart_tx:0
scb[2].uart_cts:0
scb[2].uart_rts:0
scb[0].uart_rx:1
scb[0].uart_tx:1
scb[0].uart_cts:1
scb[0].uart_rts:1
Alt. Function 3
can[1].can_rx:0
can[1].can_tx:0
Alt. Function 4
can[1].can_tx_enb_n:0
scb[1].i2c_scl:0
scb[1].i2c_sda:0
wakeup
scb[2].i2c_scl:0
scb[2].i2c_sda:0
lpcomp.comp[0]:1
lpcomp.comp[1]:1
scb[0].i2c_scl:0
scb[0].i2c_sda:0
scb[1].i2c_scl:1
scb[1].i2c_sda:1
Alt. Function 5
scb[0].spi_select1:0
scb[0].spi_select2:0
scb[0].spi_select3:0
scb[1].spi_mosi:1
scb[1].spi_miso:1
scb[1].spi_clk:1
scb[1].spi_select0:1
scb[2].spi_mosi:0
scb[2].spi_miso:0
scb[2].spi_clk:0
scb[2].spi_select0:0
scb[2].spi_select1:0
scb[2].spi_select2:0
scb[2].spi_select3:0
scb[0].spi_mosi:1
scb[0].spi_miso:1
scb[0].spi_clk:1
scb[0].spi_select0:1
scb[0].spi_select1:1
scb[0].spi_select2:1
scb[0].spi_select3:1
scb[1].spi_mosi:2
scb[1].spi_miso:2
scb[1].spi_clk:2
scb[1].spi_select0:2
scb[1].spi_select1:1
scb[1].spi_select2:1
scb[1].spi_select3:1
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