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LUPA-4000_07 Datasheet, PDF (26/38 Pages) Cypress Semiconductor – 4M Pixel CMOS Image Sensor
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LUPA-4000
Pad
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35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
Pin
Q8
R4
R5
R6
R7
K2
Q9
Q10
R8
R9
R10
R11
Q11
R12
Q12
P15
Q14
Q15
R13
R14
R15
P14
Q13
R16
Q16
P16
N14
N15
L16
L15
N16
M16
L14
M15
M14
K14
J14
J15
J16
Pin Name
sh_col
pre_col
norowsel
clock_y
sync_y
eos_y_r
temp_diode_p
temp_diode_n
vpix
vmem_l
vmem_h
vres
vres_ds
ref_low
linear_conv
bit_9
bit_8
bit_7
bit_6
bit_5
bit_4
bit_3
bit_2
bit_1
bit_0
clock
gndd
vddd
gnda
vdda
bit_inv
CMD_SS
analog_in
CMD_FS
ref_high
vres_ds
vres
vpre_l
vdd
Pin Type
Input
Input
Input
Input
Input
Testpin
Testpin
Testpin
Supply
Supply
Supply
Supply
Supply
Input
Input
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Input
Supply
Supply
Supply
Supply
Input
Input
Input
Input
Input
Supply
Supply
Supply
Supply
Description
Digital input. Control signal of the column readout.
Digital input. Control signal of the column readout to reduce row-blanking
time.
Digital input. Control signal of the column readout.
Digital input. Clock of the Y-addressing.
Digital input. Synchronises the Y-address register.
Indicates when the end of frame is reached when scanning in the 'right'
direction.
Anode of temperature diode.
Cathode of temperature diode.
Power supply pixel array.
Power supply Vmem drivers.
Power supply Vmem drivers.
Power supply reset drivers.
Power supply reset drivers.
Analog reference input. Low reference voltage of ADC. (see Figure 7 for
exact resistor value)
Digital input. 0= linear conversion; 1= gamma correction.
Digital output 1 <9> (MSB).
Digital output 1 <8>.
Digital output 1 <7>.
Digital output 1 <6>.
Digital output 1 <5>.
Digital output 1 <4>.
Digital output 1 <3>.
Digital output 1 <2>.
Digital output 1 <1>.
Digital output 1 <0> (LSB).
ADC clock input.
Digital GND of ADC circuitry.
Digital supply of ADC circuitry (nominal 2.5V).
Analog GND of ADC circuitry.
Analog supply of ADC circuitry (nominal 2.5V).
Digital input. 0=no inversion of output bits; 1 = inversion of output bits.
Analog reference input. Biasing of second stage of ADC. Connect to VDDA
with R=50 kΩ and decouple with C=100 nF to GNDa.
Analog input of 1st ADC.
Analog reference input. Biasing of first stage of ADC. Connect to VDDA with
R=50 kΩand decouple with C=100 nF to GNDa.
Analog reference input. High reference voltage of ADC.
(see Figure 7 for exact resistor value)
Power supply reset drivers.
Power supply reset drivers.
Power supply precharge drivers. Must be able to sink current. Can also be
connected to ground.
Power supply digital modules.
Document Number: 38-05712 Rev. *B
Page 26 of 38
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