CY8CTMG200-32LQXI Datasheet, PDF (197/309 Pages) Cypress Semiconductor – Technical Reference Manual (TRM)

USBIO_CR1
0,35h
21.3.10 USBIO_CR1
USB I/O Control Register 1
Individual Register Names and Addresses:
USBIO_CR1 : 0,35h
Access : POR
Bit Name
7
RW : 0
IOMode
6
RW : 0
Drive Mode
5
RW : 0
DPI
0,35h
4
RW : 0
DMI
3
RW : 0
PS2PUEN
2
RW : 0
USBPUEN
1
R :1
DPO
0
R:1
DMO
This register is a USBIO manual control register 1.
For additional information, refer to the Register Definitions on page 171 in the Full-Speed USB chapter.
Bit
Name
Description
7
IOMode
6
Drive Mode
5
DPI
4
DMI
3
PS2PUEN
2
USBPUEN
1
DPO
0
DMO
This bit allows the configuration of D+ and D- pins.
This bit configures D+ and D- pins for either CMOS drive or open drain drive.
This bit drives the D+ pin if IOMode=1.
This pin drives the D- pin if IOMode=1.
This bit controls the connection of the two internal 5 kΩ pull up resistors to the D+ and D- pins.
This bit controls the connection of the internal 1.5 kΩ pull up resistor on the D+ pin.
This read only bit provides the D+ pin status.
This read only bit provides the D- pin status.
PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
197
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