STC5425 Datasheet, PDF (41/48 Pages) Connor-Winfield Corporation – Line Card Clock

STC5425
Line Card Clock
Data sheet
Write Sequence
First
Second
Third
Bit 7 ~ 0
0x51
0x52
0x53
MCLK_Freq_Reset, 0x7F (R/W)
Register Writes:
Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
0x7F
External oscillator frequency selection
Select accepted frequency of MCLK input by writing the associated value to this register three times consecu-
tively, with no intervening read/writes from/to other register. The associated values for the four accepted fre-
quency (10MHz, 12.8MHz, 19.2MHz, 20MHz) are as shown in table below. Three times of consecutive writes
will trigger internal soft-reset. Initial default accepted frequency for STC5425 is 12.8MHz. The accepted fre-
quency of MCLK input returns to 12.8MHz following any regular reset.
Perform writes at least 50us after the regular reset has done.
Written value is shown below:
Bit 7 ~ 0
0x11
0x22
0x44
0x88
External Oscillator Frequency Selection
10MHz
12.8MHz
19.2MHz
20MHz
Register Read:
Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
0x7F
FRQID
COUNT
ID_Written_Value
FRQID
Indicates the ID of the frequency of MCLK that the STC5425 currently accept. Constant 1 can be read from
FRQID initially since the default accepted frequency for the STC5425 is 12.8MHz. The value of FRQID can
only be updated when three consecutive valid writes are written to the register MCLK_Freq_Reset completely.
Bit 7 ~ 6 FRQID
0
1
2
3
MCLK Frequency
10MHz
12.8MHz
19.2MHz
20MHz
Preliminary
Page 41 of 48 TM113
Rev:P1.3
© Copyright the Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
Date: September 20, 2011