CS42325 Datasheet, PDF (9/71 Pages) Cirrus Logic – 10-In, 6-Out, 2 Vrms Audio CODEC with Headphone

CS42325
MUTEC1
Mute Control 1 (Output) - Active-low mute output can drive external circuitry to eliminate the
11 clicks and pops associated with any single-rail output. This pin will become a high-impedance out-
put during power-down mode or when an invalid MCLK to LRCK ratio is detected.
MUTEC2
Mute Control 2 (Output) - Active-low mute output can drive external circuitry to eliminate the
12 clicks and pops associated with any single-rail output. This pin will become a high-impedance out-
put during power-down mode or when an invalid MCLK to LRCK ratio is detected.
MUTEC3
Mute Control 3 (Output) - Active-low mute output can drive external circuitry to eliminate the
13 clicks and pops associated with any single-rail output. This pin will become a high-impedance out-
put during power-down mode or when an invalid MCLK to LRCK ratio is detected.
VCMBUF
14 VCMBUF (Output) - Internally buffered VCMDAC
VCMDAC
15
DAC Common-Mode Voltage (Output) - Filter connections for the DAC internal quiescent refer-
ence voltage.
VA_H
16
18
Analog High Voltage Power (Input) - Positive power for the internal output buffer section.
GNDH
17 Analog Ground (Input) - Ground reference for high-voltage section.
AOUT1A, AOUT1B 19, 20 Line Level Analog Audio Outputs (Output) - The full-scale output level is specified in the DAC
AOUT2A, AOUT2B 21, 22 Analog Characteristics specification table.
AOUT3A/HPA
AOUT3B/HPB
23 Line Level/Headphone Analog Audio Outputs (Output) - The full-scale output level is specified
24 in the DAC Analog Characteristics specification table.
AIN5B, AIN5A
AIN4B, AIN4A
AIN3B, AIN3A
AIN2B, AIN2A
AIN1B, AIN1A
25, 26
27, 28
29, 30
31, 32
Stereo Analog Inputs 1-5 (Input) - The full-scale input level is specified in the ADC Analog Char-
acteristics specification table.
33, 34
RST
35 Reset (Input) - The device enters a low-power mode when this pin is driven low.
OVFL
36 ADC Overflow (Output) - Indicates an ADC overflow condition is present.
SDIN2
SDIN1
37
38
Serial Audio Data Input (Input) - Input for two’s complement serial audio data.
MCLK2
39
Master Clock 2 (Input) - Optional asynchronous clock source for the DAC’s delta-sigma modula-
tors.
LRCK2
40
Serial Port 2 Left/Right Clock (Input/Output) - Determines which channel, Left or Right, is cur-
rently active on the serial audio input data line.
SCLK2
41 Serial Port 2 Serial Bit Clock (Input/Output) - Serial bit clock for serial audio interface 2.
VD
42 Digital Power (Input) - Positive power for the internal digital section.
GND
43 Digital Ground (Input) - Ground reference for the internal digital section.
Digital Interface Power (Input) - Determines the required signal level for the control and serial
VL
44 port interfaces as shown in “I/O Power Rails” on page 12. Refer to the“Recommended Operating
Conditions” on page 13 for appropriate voltages.
SDOUT
45 Serial Audio Data Output (Output) - Output for two’s complement serial audio data.
SCLK1
46 Serial Port 1 Serial Bit Clock (Input/Output) - Serial bit clock for serial audio interface 1.
LRCK1
47
Serial Port 1 Left/Right Clock (Input/Output) - Determines which channel, Left or Right, is cur-
rently active on the serial audio output data line.
MCLK1
48
Master Clock 1 (Input) - Clock source for the ADC’s delta-sigma modulators. By default, this sig-
nal also clocks the DAC’s delta-sigma modulators.
DS838A2
9