CS42325 Datasheet, PDF (6/71 Pages) Cirrus Logic – 10-In, 6-Out, 2 Vrms Audio CODEC with Headphone

CS42325
7. GROUNDING AND POWER SUPPLY DECOUPLING ........................................................................ 64
8. ADC FILTER PLOTS ........................................................................................................................... 65
9. DAC DIGITAL FILTER RESPONSE PLOTS ................................................................................ 67
10. PARAMETER DEFINITIONS .............................................................................................................. 69
11. PACKAGE DIMENSIONS ................................................................................................................. 70
THERMAL CHARACTERISTICS AND SPECIFICATIONS ................................................................. 70
12. ORDERING INFORMATION .............................................................................................................. 71
13. REVISION HISTORY .......................................................................................................................... 71
LIST OF FIGURES
Figure 1.Equivalent Analog Output Load .................................................................................................. 19
Figure 2.Maximum Analog Line Output Loading ....................................................................................... 19
Figure 3.Serial Input Timing ...................................................................................................................... 22
Figure 4.Serial Output Timing ................................................................................................................... 23
Figure 5.Software Mode Timing - I²C Format ............................................................................................ 24
Figure 6.Software Mode Timing - SPI Mode ............................................................................................. 25
Figure 7.Typical Connection Diagram - Software Mode ........................................................................... 26
Figure 8.Typical Connection Diagram - Hardware Mode .......................................................................... 27
Figure 9.Serial Port Topology ................................................................................................................... 29
Figure 10.Master Mode Clock Generation ................................................................................................ 30
Figure 11.Converter Clocking ................................................................................................................... 31
Figure 12.Tri-State Serial Port .................................................................................................................. 31
Figure 13.Left-Justified up to 24-Bit Data .................................................................................................. 32
Figure 14.I²S up to 24-Bit Data ................................................................................................................. 32
Figure 15.Right-Justified 16-Bit Data, Right-Justified 24-Bit Data ............................................................ 32
Figure 16.Analog Input Architecture .......................................................................................................... 33
Figure 17.De-Emphasis Curve .................................................................................................................. 35
Figure 18.Analog Output Architecture ....................................................................................................... 36
Figure 19.Initialization Flow Chart ............................................................................................................. 39
Figure 20.Software Mode Timing, I²C Write .............................................................................................. 41
Figure 21.Software Mode Timing, I²C Read .............................................................................................. 41
Figure 22.Software Mode Timing, SPI Mode ............................................................................................ 43
Figure 23.Single-Speed Mode Stopband Rejection .................................................................................. 65
Figure 24.Single-Speed Mode Transition Band ........................................................................................ 65
Figure 25.Single-Speed Mode Transition Band (Detail) ............................................................................ 65
Figure 26.Single-Speed Mode Passband Ripple ...................................................................................... 65
Figure 27.Double-Speed Mode Stopband Rejection ................................................................................. 65
Figure 28.Double-Speed Mode Transition Band ....................................................................................... 65
Figure 29.Double-Speed Mode Transition Band (Detail) .......................................................................... 66
Figure 30.Double-Speed Mode Passband Ripple ..................................................................................... 66
Figure 31.Single-Speed Stopband Rejection ............................................................................................ 67
Figure 32.Single-Speed Transition Band .................................................................................................. 67
Figure 33.Single-Speed Transition Band (detail) ...................................................................................... 67
Figure 34.Single-Speed Passband Ripple ................................................................................................ 67
Figure 35.Double-Speed Stopband Rejection ........................................................................................... 67
Figure 36.Double-Speed Transition Band ................................................................................................. 67
Figure 37.Double-Speed Transition Band (detail) ..................................................................................... 68
Figure 38.Double-Speed Passband Ripple ............................................................................................... 68
Figure 39.Quad-Speed Stopband Rejection ............................................................................................. 68
Figure 40.Quad-Speed Transition Band ................................................................................................... 68
Figure 41.Quad-Speed Transition Band (detail) ....................................................................................... 68
Figure 42.Quad-Speed Passband Ripple ................................................................................................. 68
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DS838A2