CS35L32 Datasheet, PDF (9/51 Pages) Cirrus Logic – Boosted Class D Amplifier with Speaker-Protection Monitoring and Flash LED Drivers

CS35L32
3 Characteristics and Specifications
Table 3-4. Boost Converter Characteristics
Test conditions, except where noted otherwise: VA = 1.8 V, VP = 3.6 V, VBST = 5.0 V, amp gain = 12 dB, GNDA = GNDP = 0 V, TA = +25°C, MCLK_INT
= 6 MHz. MCLK_INT is explained in Section 4.13.1 and Section 7.7.
Parameters
Symbol
Test Conditions
Min
Typical Max Units
Boost output voltage
VBST
Boosting VP*1.15
—
Bypass —
VP
5.4
V
—
V
Boost output voltage tolerance
Load regulation
Line regulation
Boost FET peak-current limit
(See Section 7.10.)
VBST
No load: I_LOAD =0 mA –5
V_(Load) 3.0 V < VP < 4.2 V; I_LOAD= 0.25A to1.5 A —
V_(Line) 3.0 V<VP<4.2 V; I_LOAD = 0 A, 500 mA —
I_MAX(B)
BST_IPK = 0000 0000 —
BST_IPK = 0010 0000 —
BST_IPK = 0100 0000 —
BST_IPK = 0110 0000 —
BST_IPK = 1000 0000 —
—
+5
%
60
— mV/A
40
— mV/V
2.89
—
A
3.30
—
A
3.72
—
A
4.14
—
A
4.56
—
A
Output switching frequency ¹
Boost FET ON resistance
Boost FET ON resistance temp coefficient
f_SW(B)
R_DS(ON)B
—
Rectifying FET ON resistance
R_DS(ON)R
Rectifying FET ON resistance temp coefficient
Overvoltage detection threshold
Threshold Class G On, IN+ to IN–
Threshold Class G Off, IN+ to IN–
Minimum Class G boost ON hold-off time
V_OVTH
V_IN1THON
V_IN1THOF
—
——
I_OUT(B) = 1 A —
I_OUT(B) = 1 A —
I_OUT(B) = 1 A —
I_OUT(B) = 1 A —
Boost enabled —
VBST = VP = 3.6 V —
VP = 3.6 V, VBST = 5 V —
VP = 3.6 V, VBST = 5 V —
MCLK_INT/3 —
80
—
0.2
—
150
—
0.2
—
5.5
5.7
0.60
—
0.33
—
800²
—
MHz
m
%/^oC
m
%/^oC
V
V
V
ms
Operating efficiency ³
_B
VBST = 5 V, I_OUT(B) = 500 mA —
90
—
%
VBST = 5 V, I_OUT(B) = 1.5 A —
85
—
%
1.MCLKDIV2 (see p. 37) should be configured so MCLK_INT is 6 or 6.1440 MHz (see Table 4-14) for boost-converter operation at 2 or 2.05 MHz.
2.Minimum Class G boost ON hold-off time is determined from when the low audio detection is latched until when the boost is turned off. The latching
mechanism occurs in 800-ms intervals. If the audio level is detected as low between two sequential latches, the hold-off time is extended by the
difference between when the detection occurs and the subsequent latch pulse. This may extend the hold-off time up to 1.6 s in extreme cases.
3.Efficiency specified here assumes the boost converter drives an external resistive load via the VBST pin, instead of the onboard Class D amplifier.
Table 3-5. LED Drive Characteristics
Test conditions, except where noted otherwise: VA = 1.8 V, VP = 3.6 V, VBST = 5.0 V, GNDA = GNDP = GNDPLED = 0 V, TA = +25°C.
Parameters
Min Typical Max
Flash Mode current settings, per LED ¹
(Step size = 50 mA)
LED_FLCUR = 1111 —
750
—
……
…
…
LED_FLCUR = 0001 —
50
—
Flash Inhibit Mode current settings, per LED ¹
(Step size = 50 mA)
LED_FLINHCUR = 0111 —
350
—
……
…
…
LED_FLINHCUR = 0001 —
50
—
Movie Mode current settings, per LED ¹
LED_MVCUR = 111 —
150
—
LED_MVCUR = 110 —
120
—
LED_MVCUR = 101 —
100
—
LED_MVCUR = 100 —
80
—
LED_MVCUR = 011 —
60
—
LED_MVCUR = 010 —
40
—
LED_MVCUR = 001 —
20
—
LED current accuracy
–10
—
+10
LED current matching
—
10
—
Flash timer (t_flash)
MCLK_INT
=
6
MHz
2_;
TIMER
= 1 0010–1
TIMER = 0
1111
0001
—
—
500
75
—
—
TIMER = 0 0000 —
50
—
MCLK_INT
=
6.144
MHz;
TIMER
= 1 0010–1
TIMER = 0
1111
0001
—
—
488.3
73.2
—
—
TIMER = 0 0000 —
48.8
—
LED flash timer accuracy
0
—
+1
LED flash inhibit time (FLINH high to LED current 3% settling)
—
40
—
Units
mA
…
mA
mA
…
mA
mA
mA
mA
mA
mA
mA
mA
%
%
ms
ms
ms
ms
ms
ms
ms
s
1.Flash or Movie Mode current is delivered from the boost converter’s output, which provides a voltage higher than the LED voltage. Depending on the
LED voltage requirement and on VP supply voltage, the boost converter is internally controlled to boost or be in bypass (rectifying FET fully on).
2.The flash time setting is generated from MCLK_INT. MCLKDIV2 (see p. 37) should be configured so MCLK_INT is 6 or 6.1440 MHz. See Table 4-14.
DS963F5
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