CS35L32 Datasheet, PDF (40/51 Pages) Cirrus Logic – Boosted Class D Amplifier with Speaker-Protection Monitoring and Flash LED Drivers

CS35L32
7.16 Interrupt Mask 1
Bits Name
Description
0 OTE_ Overtemperature error protection release. Releases (removes) OTE-caused Speaker-Safe Mode if the OTE condition is no
RLS longer present, which can be determined by reading OTE (see Section 7.19) twice.
0 (Default)
If the OTE condition is present, Speaker-Safe Mode is applied.
1
0  1  0 sequence At the end of the sequence, if the OTE condition is no longer present, the Speaker-Safe Mode is
cleared, unless an amplifier short cause is still active.
Note: For these bits, if the condition that causes automatic protection becomes true again during the protection potential release sequence
(x_RLS: 0  1  0), protection is not removed, the related interrupt status bit is set again, and, if unmasked, a new interrupt is generated.
7.16 Interrupt Mask 1
Address 0x12
R/W
7
6
5
4
3
2
1
0
—
M_ADSPCLK_ERR M_MCLK_ERR M_AMP_SHORT M_OTW
M_OTE
Default
1
1
1
1
1
1
1
1
Interrupt mask register bits serve as a mask for the interrupt sources in the interrupt status registers. Interrupts are described in Section 4.2.
Bits
Name
7:5
—
Reserved
4 M_ADSPCLK_ERR Error masks
3
M_MCLK_ERR
0 Unmasked
1 (Default) Masked
2 M_AMP_SHORT AMP_SHORT mask
0 Unmasked
1 (Default) Masked
1
M_OTW
OTW mask
0 Unmasked
1 (Default) Masked
0
M_OTE
OTE mask
0 Unmasked
1 (Default) Masked
Description
7.17 Interrupt Mask 2
Address 0x13
R/W
7
6
5
4
M_VMON_OVFL M_IMON_OVFL M_VPMON_OVFL
3
2
—
1
0
M_PDN_DONE
Default
1
1
1
1
1
1
1
1
Interrupt mask register bits serve as a mask for the interrupt sources in the interrupt status registers. Interrupts are described in Section 4.2.
Bits
Name
7 M_VMON_OVFL Overflow masks
6
5
M_IMON_OVFL
M_VPMON_OVFL
0 Unmasked
1 (Default) Masked
4:1
—
Reserved
0
M_PDN_DONE PDN_DONE mask
0 Unmasked
1 (Default) Masked
Description
40
DS963F5