EP7311 Datasheet, PDF (50/54 Pages) Cirrus Logic – HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE

EP7311
High-Performance, Low-Power System on Chip
Table W. JTAG Boundary Scan Signal Ordering (Continued)
LQFP TFBGA PBGA
Pin No. Ball
Ball
Signal
Type Position
201
A7
D6
202
B7
B4
204
C7
E6
205
A6
A3
206
B6
D5
207
C6
B3
208
A5
A2
nMWE/nSDWE
nMOE/nSDCAS
nCS[0]
nCS[1]
nCS[2]
nCS[3]
nCS[4]
O
358
O
360
O
362
O
364
O
366
O
368
O
370
1) See EP7311 Users’ Manual for pin naming / functionality.
2) For each pad, the JTAG connection ordering is input,
output, then enable as applicable.
50
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(All Rights Reserved)
DS506PP1