English
Language : 

EP7311 Datasheet, PDF (45/54 Pages) Cirrus Logic – HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE
Table V. 256-Ball PBGA Ball Listing (Continued)
Ball Location
Name
Type
Description
M7
SSITXFR
I/O
MCP/CODEC/SSI2 frame sync
M8
DRIVE[1]
I/O
PWM drive output
M9
FB[0]
I
PWM feedback input
M10
COL[0]
O
Keyboard scanner column drive
M11
D[27]
I/O
Data I/O
M12
VSSIO
Pad ground I/O ground
M13
A[23]/DRA[4]
O
System byte address / SDRAM address
M14
VDDIO
Pad power Digital I/O power, 3.3V
M15
A[20]/DRA[7]
O
System byte address / SDRAM address
M16
D[21]
I/O
Data I/O
N1
nEXTFIQ
I
External fast interrupt input
N2
PE[1]/BOOTSEL[1]
I
GPIO port E / boot mode select
N3
VSSIO
Pad ground I/O ground
N4
VDDIO
Pad power Digital I/O power, 3.3V
N5
PD[5]
I/O
GPIO port D
N6
PD[2]
I/O
GPIO port D
N7
SSIRXDA
I/O
MCP/CODEC/SSI2 serial data input
N8
ADCCLK
O
SSI1 ADC serial clock
N9
SMPCLK
O
SSI1 ADC sample clock
N10
COL[2]
O
Keyboard scanner column drive
N11
D[29]
I/O
Data I/O
N12
D[26]
I/O
Data I/O
N13
HALFWORD
O
Halfword access select output
N14
VSSIO
Pad ground I/O ground
N15
D[22]
I/O
Data I/O
N16
D[23]
I/O
Data I/O
P1
VSSRTC
RTC ground Real time clock ground
P2
RTCOUT
O
Real time clock oscillator output
P3
VSSIO
Pad ground I/O ground
P4
VSSIO
Pad ground I/O ground
P5
VDDIO
Pad power Digital I/O power, 3.3V
P6
VSSIO
Pad ground I/O ground
P7
VSSIO
Pad ground I/O ground
P8
VDDIO
Pad power Digital I/O power, 3.3V
P9
VSSIO
Pad ground I/O ground
P10
VDDIO
Pad power Digital I/O power, 3.3V
P11
VSSIO
Pad ground I/O ground
P12
VSSIO
Pad ground I/O ground
P13
VDDIO
Pad power Digital I/O power
P14
VSSIO
Pad ground I/O ground
P15
D[24]
I/O
Data I/O
P16
VDDIO
Pad power Digital I/O power, 3.3V
R1
RTCIN
I/O
Real time clock oscillator input
R2
VDDIO
Pad power Digital I/O power, 3.3V
R3
PD[4]
I/O
GPIO port D
R4
PD[1]
I/O
GPIO port D
R5
SSITXDA
O
MCP/CODEC/SSI2 serial data output
R6
nADCCS
O
SSI1 ADC chip select
EP7311
High-Performance, Low-Power System on Chip
Table V. 256-Ball PBGA Ball Listing (Continued)
Ball Location
R7
R8
R9
R10
R11
R12
R13
R14
R15
R16
T1
T2
T3
T4
T5
T6
T7
T8
T9
T10
T11
T12
T13
T14
T15
T16
Name
VDDIO
ADCOUT
COL[7]
COL[3]
COL[1]
D[30]
A[27]/DRA[0]
A[25]/DRA[2]
VDDIO
A[24]/DRA[3]
VDDRTC
PD[7]/SDQM[1]
PD[6]/SDQM[0]
PD[3]
SSICLK
SSIRXFR
VDDCORE
DRIVE[0]
FB[1]
COL[5]
VDDIO
BUZ
D[28]
A[26]/DRA[1]
D[25]
VSSIO
Type
Description
Pad power Digital I/O power, 3.3V
O
SSI1 ADC serial data output
O
Keyboard scanner column drive
O
Keyboard scanner column drive
O
Keyboard scanner column drive
I/O
Data I/O
O
System byte address / SDRAM address
O
System byte address / SDRAM address
Pad power Digital I/O power, 3.3V
O
System byte address / SDRAM address
RTC power Real time clock power, 2.5V
I/O
GPIO port D / SDRAM byte lane mask
I/O
GPIO port D / SDRAM byte lane mask
I/O
GPIO port D
I/O
MCP/CODEC/SSI2 serial clock
–
MCP/CODEC/SSI2 frame sync
Core power Core power, 2.5V
I/O
PWM drive output
I
PWM feedback input
O
Keyboard scanner column drive
Pad power Digital I/O power, 3.3V
O
Buzzer drive output
I/O
Data I/O
O
System byte address / SDRAM address
I/O
Data I/O
Pad ground I/O ground
DS506PP1
©Copyright Cirrus Logic, Inc. 2003
(All Rights Reserved)
45