EP7311 Datasheet, PDF (1/54 Pages) Cirrus Logic – HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE

EP7311 Data Sheet
FEATURES
I ARM720T Processor
— ARM7TDMI CPU
— 8 KB of four-way set-associative cache
— MMU with 64-entry TLB
— Thumb code support enabled
I Ultra low power
— 90 mW at 74 MHz typical
— 30 mW at 18 MHz typical
— 10 mW in the Idle State
— <1 mW in the Standby State
I 48 KB of on-chip SRAM
I MaverickKey^™ IDs
— 32-bit unique ID can be used for SDMI compliance
— 128-bit random ID
I Dynamically programmable clock speeds of
18, 36, 49, and 74 MHz
High-Performance,
Low-Power System on Chip with
SDRAM and Enhanced Digital
Audio Interface
OVERVIEW
The Maverick™ EP7311 is designed for ultra-low-power
applications such as PDAs, smart cellular phones, and
industrial hand held information appliances. The core-
logic functionality of the device is built around an
ARM720T processor with 8 KB of four-way set-
associative unified cache and a write buffer. Incorporated
into the ARM720T is an enhanced memory management
unit (MMU) which allows for support of sophisticated
operating systems like Linux^®.
BLOCK DIAGRAM
(cont.)
(cont.)
Multimedia
Codec Port
Serial
Interface
Power
Management
(2) UARTs
w/ IrDA
Boot
ROM
Internal Data Bus
EPB Bus
ARM720T
ICE-JTAG
ARM7TDMI CPU Core
8 KB Write
Cache Buffer
MMU
Bus
Bridge
MaverickKey^{T M}
Memory Controller
SRAM I/F
SDRAM I/F
On-chip SRAM
48 KB
Clocks &
Timers
Interrupts,
PWM & GPIO
Keypad&
Touch
Screen I/F
LCD
Controller
http://www.cirrus.com
MEMORY AND STORAGE
©Copyright Cirrus Logic, Inc. 2003
(All Rights Reserved)
Nov ’03
DS506PP1