EP7311 Datasheet, PDF (36/54 Pages) Cirrus Logic – HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE

EP7311
High-Performance, Low-Power System on Chip
Table 21. 204-Ball TFBGA Ball Listing (Continued)
Ball Location
Name
C20
nPOR
D1
PB[7]
D2
RXD[2]
D3
VDDIO
D18
VSSIO
D19
nBATCHG
D20
A[7]
E1
PB[4]
E2
TXD[2]
E3
WRITE/nSDRAS
E18
E19
E20
F1
F2
F3
F18
F19
F20
G1
G2
G3
G18
G19
G20
H1
H[2]
H[3]
H[18]
36
nMEDCHG/nBROM
nEXTPWR
D[9]
PB[3]
PB[6]
TDI
D[7]
A[8]
D[10]
PB[1]
PB[2]
PB[5]
D[8]
A[9]
D[11]
PA[7]
TDO
PB[0]
A[10]
Strength^†
Reset
State
Type
Description
Schmitt
1
1
1
1
1
1
1
1
Input^‡
Low
Input^‡
High
Low
Low
Input^‡
Input^‡
I
I
I
Pad power
Pad ground
I
O
I
O
O
I
I
I/O
I/O
I/O
Power-on reset input
GPIO port B
UART 2 receive data
input
Digital I/O power,
3.3V
I/O ground
Battery changed
sense input
System byte address
GPIO port B
UART 2 transmit
data output
Transfer direction /
SDRAM RAS signal
output
Media change
interrupt input /
internal ROM boot
enable
External power
supply sense input
Data I/O
GPIO port B
GPIO port B
with p/u*
1
1
1
1
1
1
1
1
1
1
1
1
1
Low
Low
Low
Input^‡
Input^‡
Input^‡
Input^‡
Low
Low
Input^‡
Input^‡
Input^‡
Low
I
JTAG data input
I/O
Data I/O
O
System byte address
I/O
Data I/O
I/O
I/O
GPIO port B
I/O
GPIO port B
I/O
Data I/O
O
System byte address
I/O
Data I/O
I/O
GPIO port A
O
JTAG data out
I/O
GPIO port B
O
System byte address
©Copyright Cirrus Logic, Inc. 2003
(All Rights Reserved)
DS506PP1