EP7311 Datasheet, PDF (38/54 Pages) Cirrus Logic – HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE

EP7311
High-Performance, Low-Power System on Chip
Table 21. 204-Ball TFBGA Ball Listing (Continued)
Ball Location
Name
N18
D[17]
N19
D[19]
Strength^†
1
1
Reset
State
Low
Low
Type
I/O
I/O
N20
A[18]/DRA[9]
1
Low
O
P1
EINT[3]
I
P2
nEINT[2]
I
P3
DCD
I
P18
D[18]
1
Low
I/O
P19
A[20]/DRA[7]
1
Low
O
P20
D[20]
1
Low
I/O
R1
nEXTFIQ
I
R2
PE[2]/CLKSEL
1
Input^‡
I/O
R3
nTEST[0]
With p/u*
I
R18
A[19]/DRA[8]
1
R19
D[22]
1
R20
A[21]/DRA[6]
1
T1
PE[1]/BOOTSEL[1]
1
T2
PE[0]/BOOTSEL[0]
1
T3
nEINT[1]
T18
D[21]
1
T19
D[23]
1
T20
A[22]/DRA[5]
1
Low
O
Low
I/O
Low
O
Input^‡
I/O
Input^‡
I/O
I
Low
I/O
Low
I/O
Low
O
U1
VSSRTC
RTC ground
U2
RTCOUT
O
U3
RTCIN
I/O
U18
HALFWORD
1
U19
D[24]
1
U20
A[23]/DRA[4]
1
Low
O
Low
I/O
Low
O
V1
VDDRTC
RTC power
Description
Data I/O
Data I/O
System byte address
/ SDRAM address
External interrupt
External interrupt
input
UART 1 data carrier
detect
Data I/O
System byte address
/ SDRAM address
Data I/O
External fast
interrupt input
GPIO port E / clock
input mode select
Test mode select
input
System byte address
/ SDRAM address
Data I/O
System byte address
/ SDRAM address
GPIO port E / boot
mode select
GPIO port E / boot
mode select
External interrupt
input
Data I/O
Data I/O
System byte address
/ SDRAM address
Real time clock
ground
Real time clock
oscillator output
Real time clock
oscillator input
Halfword access
select output
Data I/O
System byte address
/ SDRAM address
Real time clock
power, 2.5V
38
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(All Rights Reserved)
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