CDB4923 Datasheet, PDF (46/50 Pages) Cirrus Logic – Evaluation Board

CDB4923 CDB49300
15. APPENDIX I: JUMPERS LISTED BY NUMBER
NOTE: Each jumper listed below is described in Appendix H: Jumpers Listed by Function. The
relevant section heading is listed beside each jumper name in braces {}.
J1
CS492x/CS493xx DSP clock {DSP Jumpers}
Default: CLKIN
J2
CS492x/CS493xx WR pin {DSP Jumpers}
Default: HI
J3
CS492x/CS493xx RD pin {DSP Jumpers}
Default: LO
J11
Stake header for CS492x/CS493xx & CRD4923-MEM & CDB49300-MEM {DSP Jumpers}
J12
Stake header for CS492x/CS493xx {DSP Jumpers}
J31
RCA/Optical S/PDIF input selection {Audio Input Jumpers}
Default: OPT
J37
Oscillator/External PLL select {System Clocking Jumpers}
J44CS8404 Channel Status Bits {Audio Output Jumpers}
Default: All bits HI (Not Populated).
J52
MASTER/SLAVE clocking mode of the CS5334 {Audio Input Jumpers}
Default: SLAVE
J59
CS492x/CS493xx Analog Power {Power Jumpers}
Default: INSTALLED
J60
CS492x/CS493xx Digital Power {Power Jumpers}
Default: INSTALLED
J62
CS492x/CS493xx PSEL pin {DSP Jumpers}
Default: HI
J63
PLD I/O Power Selection {Power Jumpers}
Default: +3.3 V
J65
CS8414 SEL pin {Audio Input Jumpers}
Default: HI (Not Populated).
J66
CS8414 CS12/FCK pin. {Audio Input Jumpers}
Default: HI (Not Populated).
J67
PS1 pin of U26 {System Clocking Jumpers}
Default: LO
J68
PS0 pin of U26 {System Clocking Jumpers}
Default: HI
J69
DSP Power Selection {Power Jumpers}
Default: +2.5 V
J70
AS1 pin of U26 {System Clocking Jumpers}
Default: LO
J71
AS0 pin of U26 {System Clocking Jumpers}
Default: LO
J72
PS2 pin of U26 {System Clocking Jumpers}
Default: LO
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DS262DB2