CDB4923 Datasheet, PDF (3/50 Pages) Cirrus Logic – Evaluation Board

CDB4923 CDB49300
12. APPENDIX F: BOARD CONTROL SOFTWARE ................................................................. 39
13. APPENDIX G: IC COMPONENT LISTING BY FUNCTION ................................................. 42
13.1 Power ............................................................................................................................. 42
13.2 Reset .............................................................................................................................. 42
13.3 Clocking.......................................................................................................................... 42
13.4 Signal Routing/Level Conversion ................................................................................... 42
13.5 DSP ................................................................................................................................ 42
13.6 Input................................................................................................................................ 42
13.7 Output............................................................................................................................. 42
14. APPENDIX H: JUMPERS LISTED BY FUNCTION ............................................................. 43
14.1 Audio Input Jumpers....................................................................................................... 43
14.2 Audio Output Jumpers .................................................................................................... 43
14.3 DSP Jumpers ................................................................................................................. 43
14.4 Power Jumpers............................................................................................................... 44
14.5 System Clocking Jumpers .............................................................................................. 44
15. APPENDIX I: JUMPERS LISTED BY NUMBER .................................................................. 46
16. APPENDIX J: SWITCH SUMMARY ..................................................................................... 47
LIST OF FIGURES
Figure 1. External Memory Example............................................................................................... 9
Figure 2. CDB4923/300 Data Paths.............................................................................................. 11
Figure 3. Audio Clocking ............................................................................................................... 12
Figure 4. Audio Clocking ............................................................................................................... 12
Figure 4. CS492x/CS493xx........................................................................................................... 18
Figure 5. System Power................................................................................................................ 19
Figure 6. PC Interface ................................................................................................................... 20
Figure 7. Control Logic.................................................................................................................. 21
Figure 8. Clocking ......................................................................................................................... 22
Figure 9. Analog Input................................................................................................................... 23
Figure 10. Digital Input .................................................................................................................. 24
Figure 11. D/A Converters ............................................................................................................ 25
Figure 12. Analog Output .............................................................................................................. 26
Figure 13. Digital Output ............................................................................................................... 27
Figure 14. Top Layer..................................................................................................................... 28
Figure 15. Bottom Layer................................................................................................................ 29
Figure 16. SSTOP......................................................................................................................... 30
Figure 17. ASYSTOP .................................................................................................................... 31
Figure 18. Layer 2 ......................................................................................................................... 32
Figure 19. Layer 3 ......................................................................................................................... 33
Figure 20. CRD4923-MEM Schematic.......................................................................................... 37
Figure 21. CDB49300-MEM Schematic ........................................................................................ 38
DS262DB2
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