CS2000-CP Datasheet, PDF (26/36 Pages) Cirrus Logic – Fractional-N Clock Synthesizer & Clock Multiplier

CS2000-CP
6.3 Memory Address Pointer
The Memory Address Pointer (MAP) byte comes after the address byte and selects the register to be read
or written. Refer to the pseudocode above for implementation details.
6.3.1
Map Auto Increment
The device has MAP auto increment capability enabled by the INCR bit (the MSB) of the MAP. If INCR is
set to 0, MAP will stay constant for successive I²C writes or reads and SPI writes. If INCR is set to 1, MAP
will auto increment after each byte is read or written, allowing block reads or writes of successive regis-
ters.
7. REGISTER QUICK REFERENCE
This table shows the register and bit names with their associated default values.
EnDevCfg1 and EnDevCfg2 bits must be set to 1 for normal operation.
WARNING: All “Reserved” registers must maintain their default state to ensure proper functional operation.
Adr Name
01h Device ID
p 27
02h Device Ctrl
p 27
03h Device Cfg 1
p 28
04h Device Cfg 2
p 29
05h Global Cfg
p 30
06h _32-Bit
-
09h
Ratio 0
0Ah
-
0Dh
32-Bit
Ratio 1
0Eh _32-Bit
-
11h
Ratio 2
12h _32-Bit
-
15h
Ratio 3
16h Funct Cfg 1
p 31
17h Funct Cfg 2
p 32
1Eh Funct Cfg 3
p 32
7
Device4
0
Unlock
x
RModSel2
0
Reserved
0
Reserved
0
MSB
MSB-8
LSB+15
LSB+7
MSB
MSB-8
LSB+15
LSB+7
MSB
MSB-8
LSB+15
LSB+7
MSB
MSB-8
LSB+15
LSB+7
ClkSkipEn
0
Reserved
0
Reserved
0
6
5
4
3
2
1
0
Device3 Device2 Device1 Device0 Revision2 Revision1 Revision0
0
0
0
0
x
x
x
FsDet1
FsDet0 Reserved Reserved Reserved AuxOutDis ClkOutDis
x
x
0
0
0
0
0
RModSel1 RModSel0 RSel1
RSel0 AuxOutSrc1 AuxOutSrc0 EnDevCfg1
0
0
0
0
0
0
0
Reserved Reserved Reserved AutoRMod LockClk1 LockClk0 FracNSrc
0
0
0
0
0
0
0
Reserved Reserved Reserved Freeze Reserved Reserved EnDevCfg2
0
0
0
0
0
0
0
........................................................................................................................... MSB-7
........................................................................................................................... MSB-15
........................................................................................................................... LSB+8
...........................................................................................................................
LSB
........................................................................................................................... MSB-7
........................................................................................................................... MSB-15
........................................................................................................................... LSB+8
...........................................................................................................................
LSB
........................................................................................................................... MSB-7
........................................................................................................................... MSB-15
........................................................................................................................... LSB+8
...........................................................................................................................
LSB
........................................................................................................................... MSB-7
........................................................................................................................... MSB-15
........................................................................................................................... LSB+8
...........................................................................................................................
LSB
AuxLockCfg Reserved RefClkDiv1 RefClkDiv0 Reserved Reserved Reserved
0
0
0
0
0
0
0
Reserved Reserved ClkOutUnl LFRatioCfg Reserved Reserved Reserved
0
0
0
0
0
0
0
ClkIn_BW2 ClkIn_BW1 ClkIn_BW0 Reserved Reserved Reserved Reserved
0
0
0
0
0
0
0
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DS761PP1