XMEGAA_09 Datasheet, PDF (258/445 Pages) ATMEL Corporation – Interrupts and Programmable Multi-level Interrupt Controller

XMEGA A
22.3 Registers Description
22.3.1 TXPLCTRL - IRCOM Transmitter Pulse Length Control Register
Bit
7
6
5
4
3
2
1
0
+0x01
TXPLCTRL[7:0]
TXPLCTRL
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial Value
0
0
0
0
0
0
0
0
22.3.2
• Bits 7:0 - TXPLCTRL[7:0] - Transmitter Pulse Length Control
The 8-bit value sets the pulse modulation scheme for the transmitter. Setting this register will
have no effect if IRCOM mode is not selected by a USART.
By leaving this register value to zero, 3/16 of baud rate period pulse modulation is used.
Setting this value from 1 to 254 will give a fixed pulse length coding. The 8-bit value sets the
number of system clock periods for the pulse. The start of the pulse will be synchronized with the
rising edge of the baud rate clock.
Setting the value to 255 (0xFF) will disable pulse coding, letting the RX and TX signals pass
through the IRCOM Module unaltered. This enables other features through the IRCOM Module,
such as half-duplex USART, Loop-back testing and USART RX input from an Event Channel.
Note: TXPCTRL must be configured before USART transmitter is enabled (TXEN).
RXPLCTRL - IRCOM Receiver Pulse Length Control Register
Bit
7
6
5
4
3
2
1
0
+0x02
RXPLCTRL[7:0]
RXPLCTRL
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial Value
0
0
0
0
0
0
0
0
22.3.3
• Bits 7:0 - RXPLCTRL[7:0] - Receiver Pulse Length Control
The 8-bit value sets the filter coefficient for the IRCOM transceiver. Setting this register will have
no effect if IRCOM mode is not selected by a USART.
By leaving this register value to zero, filtering is disabled. Setting this value between 1 and 255
will enable filtering, where x+1 equal samples is required for the pulse to be accepted.
Note: RXPCTRL must be configured before USART receiver is enabled (RXEN).
CTRL - IRCOM Control Register
Bit
7
6
5
4
3
2
1
0
+0x00
-
-
-
-
EVSEL[3:0]
CTRL
Read/Write
R
R
R
R
R/W
R/W
R/W
R/W
Initial Value
0
0
0
0
0
0
0
0
• Bits 7:4 - Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
8077H–AVR–12/09
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