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XMEGAA_09 Datasheet, PDF (181/445 Pages) ATMEL Corporation – Interrupts and Programmable Multi-level Interrupt Controller
XMEGA A
15.6
Fault Protection
The Fault Protection feature enables fast and deterministic action when a fault is detected. The
fault protection is event controlled, thus any event from the Event System can be used to trigger
a fault action.
When the Fault Protection is enabled an incoming event from any of the selected event channel
can trigger the event action. Each event channel can be separately enabled as fault protection
input, and the specified event channels will be ORed together allowing multiple event sources
top be used for fault protection at the same time.
15.6.1
Fault Actions
Two different even actions can be selected:
• The Clear Override Enable action will clear the Output Override Enable register (OUTOVEN)
and disable the output override on all Timer/Counter outputs. The result is that the in the
output will be as set by the port pin configuration.
• The Direction Clear action will clear the Direction (DIR) register in the associated port, setting
all port pins as tri-stated inputs.
When a fault is detected the Fault Detection Flag is set, and the Timer/Counter’s Error Interrupt
Flag is set and the optional interrupt is generated.
From the event occurs in one peripherals until the Fault Protection triggers the event action,
there is maximum two peripheral clock cycles. The Fault Protection is fully independent of the
CPU and DMA, but it requires the Peripheral Clock to run.
15.6.2
Fault Restore Modes
After a fault, that is when the fault condition is no longer active, it is selectable how the AWeX
and Timer/Counter can return from fault state and restore with normal operation. Two different
modes are available:
• In Latched Mode the waveform output will remain in the fault state until the fault condition is
no longer active and the fault detect flag has been cleared by software. When both of these
conditions are met, the waveform output will return to normal operation at the next UPDATE
condition.
• In Cycle-by-Cycle Mode the waveform output will remain in the fault state until the fault
condition is no longer active. When this condition is met, the waveform output will return to
normal operation at the next UPDATE condition.
When entering fault state and the Clear Override Enable action is selected, the OUTOVEN[7:0]
bits are reassigned a value on the next UPDATE condition. In pattern generation mode the reg-
ister is restored with the value in the DTLSBUF register. Otherwise the register bits are restored
according to the enabled DTI channels.
When entering fault state and Direction Clear action is select is set, corresponding DIR[7:0] bits
is restored with the value in the DTLSBUF register in pattern generation mode and for the pin
pairs corresponding to enabled DTI channels otherwise.
The UPDATE condition used to restore the normal operation is the same update as in the
Timer/Counter.
15.6.3
Change Protection
To avoid unintentional changes in the fault protection setup all the control registers in the AWeX
Extension can be protected by writing the corresponding lock bit Advanced Waveform Extension
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