EP2AGX190FF35C4N Datasheet, PDF (75/90 Pages) Altera Corporation – Volume 3: Device Datasheet and Addendum

Chapter 1: Device Datasheet for Arria II Devices
Switching Characteristics
1–67
Table 1–55. DPA Lock Time Specifications for Arria II Devices (Note 1), (2), (3)
Standard
Training Pattern
Number of Data
Transitions in One
Repetition of the
Training Pattern
Number of
Repetitions per
256 Data
Transitions (4)
SPI-4
00000000001111111111
2
128
Parallel Rapid I/O
00001111
10010000
2
128
4
64
Miscellaneous
10101010
01010101
8
32
8
32
Notes to Table 1–55:
(1) The DPA lock time is for one channel.
(2) One data transition is defined as a 0-to-1 or 1-to-0 transition.
(3) The DPA lock time stated in the table applies to both commercial and industrial grade.
(4) This is the number of repetitions for the stated training pattern to achieve the 256 data transitions.
Maximum
640 data transitions
640 data transitions
640 data transitions
640 data transitions
640 data transitions
Figure 1–5 shows the LVDS soft-CDR/DPA sinusoidal jitter tolerance specification for
Arria II GZ devices at a data rate less than 1.25 Gbps and all the Arria II GX devices.
Figure 1–5. LVDS Soft-CDR/DPA Sinusoidal Jitter Tolerance Specification for All Arria II GX Devices and for Arria II GZ
Devices at a Data Rate less than 1.25 Gbps
Sinusoidal Jitter Amplitude (UI)
20db/dec
0.1
P-P
baud/1667
20,000,000
Jitter Frequency (Hz)
July 2012 Altera Corporation
Arria II Device Handbook Volume 3: Device Datasheet and Addendum