EP2S180 Datasheet, PDF (43/58 Pages) Altera Corporation – DSP Development Board

Board Components & Interfaces
Table 2–28. CompactFlash (CON1) Pin Table (Part 2
of 2)
Pin on
CompactFlash
(CON1)
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
CompactFlash
Function (U60)
Connects to (1)
D11
D12
D13
D14
D15
CS1#
VS1#
IORD#
IOWR#
WE#
INTRQ
VCC
CSEL#
VS2#
RESET (4)
WAIT#
INPACK#
REG#
DASP#
PDIAG#
DO8
DO9
D10
VSS
AA2
AA4
Y5
AB2
AB4
AC9
AB10
AC2
AC1
AC6
AC4
V_CC (2)
AC8
AB9
AE12
AC3
AC7
AB7
AE4
AF2
V3
W2
Y3
GND (3)
Notes to Table 2–28:
(1) All pin numbers represent I/O pins on the FPGA, unless
otherwise noted.
(2) This FPGA I/O pin controls a power MOSFET that supplies
5V V_CC to CON1.
(3) This pin does not connect to the FPGA directly.
(4) RESET is driven by the EPM7256AE configuration
controller device.
Altera Corporation
Core Version a.b.c variable
2–35
Stratix II EP2S180 DSP Development Board Reference Manual