EP2S180 Datasheet, PDF (42/58 Pages) Altera Corporation – DSP Development Board

Board Components
■ Pin 41 of CON1 (RESET) is pulled up to 5V through a 10-KΩ resistor,
and is controlled by the EPM7128AE configuration controller. The
FPGA can cause the configuration controller to assert RESET, but the
FPGA does not drive this signal directly.
Table 2–28 provides CompactFlash pin-out details.
Table 2–28. CompactFlash (CON1) Pin Table (Part 1
of 2)
Pin on
CompactFlash
(CON1)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
CompactFlash
Function (U60)
Connects to (1)
GND
D03
D04
D05
D06
D07
CS0#
A10
ATA_SEL#
A09
A08
A07
VCC
A06
A05
A04
A03
A02
A01
A00
DO0
DO1
DO2
IOCS16#
CD2#
CD1#
GND
AA3
AA1
Y2
W1
V2
AE3
AF1
AD12
AF3
AF4
AG1
V_CC (2)
AD6
AD7
AA8
AA9
AE2
AD2
AE1
AB3
AB1
Y4
AD1
AB8 (3)
AC15
2–34
Core Version a.b.c variable
Stratix II EP2S180 DSP Development Board Reference Manual
Altera Corporation