EP2S180 Datasheet, PDF (35/58 Pages) Altera Corporation – DSP Development Board

Altera Corporation
Board Components & Interfaces
SDRAM Memory (U39 and U40)
The SDRAM devices (U39 and U40) are 2 Micron MT48LC4M32B2
devices with PC100 functionality and self refresh mode. The SDRAM is
fully synchronous with all signals registered on the positive edge of the
system clock.
The SDRAM device pins are connected to the Stratix II device. An
SDRAM controller peripheral is included with the Stratix II DSP
Development Kit, Professional Edition, and allows a Nios II processor to
view the SDRAM devices as a large, linearly-addressable memory.
Table 2–23 lists the Stratix II device pin-outs for SDRAM device U39.
Table 2–23. SDRAM Device (U39) Pin-Outs (Part 1 of 2)
Pin Name
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
BA0
BA1
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
Pin Number Connects to Stratix II Pin
25
AD11
26
AD13
27
AB13
60
AE14
61
AB14
62
AC14
63
AD14
64
AE10
65
AB15
66
AC16
24
AB16
21
AE13
22
AL9
23
AF11
2
AL4
4
AJ5
5
AH5
7
AM4
8
AG9
10
AH6
11
AH7
13
AH9
74
AM5
Core Version a.b.c variable
2–27
Stratix II EP2S180 DSP Development Board Reference Manual