EP2S180 Datasheet, PDF (39/58 Pages) Altera Corporation – DSP Development Board

Altera Corporation
Board Components & Interfaces
Ethernet MAC/PHY (U16)
The LAN91C111 (U16) is a mixed signal analog/digital device that
implements protocols at 10 Mbps and 100 Mbps. The control pins of U16
are connected to the Stratix II device so that user logic (e.g., the Nios II
processor) can access Ethernet via the RJ-45 connector (RJ1). Refer to
Table 2–26 for Stratix II pin-outs for Ethernet MAC/PHY device U16.t
Table 2–26. Ethernet MAC/PHY (U16) (Part 1
of 3)
Pin Name
ENET_ADS_N
ENET_AEN
ENET_BE_N0
ENET_BE_N1
ENET_BE_N2
ENET_BE_N3
ENET_DATACS_N
ENET_INTRQ0
ENET_IOCHRDY
ENET_IOR_N
ENET_IOW_N
ENET_LDEV_N
enet_RESET_n
ENET_SRDY_N
ENET_W_R_N
SE_A0
SE_A1
SE_A2
SE_A3
SE_A4
SE_A5
SE_A6
SE_A7
SE_A8
SE_A9
SE_A10
SE_A11
Pin Number
AA25
AC25
AE26
AE25
AD25
AD24
T20
AB23
V26
AC24
AB26
T26
T25
T21
AD8
AM27
AM28
AJ27
AK27
AL29
AM29
AJ28
AH28
AK20
AJ20
AL21
Core Version a.b.c variable
2–31
Stratix II EP2S180 DSP Development Board Reference Manual