EP2S180 Datasheet, PDF (21/58 Pages) Altera Corporation – DSP Development Board

Board Components & Interfaces
Table 2–6 describes the features of the Stratix II EP2S180F1020C3 device.
Table 2–6. Stratix II EP2S180 Features
Feature
ALMs
Adaptive look-up tables (ALUTs) (1)
Equivalent LEs (2)
M512 RAM blocks
M4K RAM blocks
M-RAM blocks
Total RAM bits
DSP blocks
18-bit × 18-bit multipliers (3)
Enhanced PLLs
Fast PLLs
Maximum user I/O pins
Package type
Board reference
Voltage
71,760
143,520
179,400
930
768
9
9,383,040
96
384
4
8
742
1020-pin FineLine BGA
U15
1.2-V internal, 3.3-V I/O
Notes to Table 2–6:
(1) One ALM contains two ALUTs. The ALUT is the cell used in the Quartus II
software for logic synthesis.
(2) This is the equivalent number of LEs in a Stratix device (four-input LUT-based
architecture).
(3) These multipliers are implemented using the DSP blocks.
Switch Inputs
The board has four push-button switches for user-defined logic input.
Each push-button signal, when pressed drives logic low, and when
released resumes driving logic high.
Altera Corporation
Core Version a.b.c variable
2–13
Stratix II EP2S180 DSP Development Board Reference Manual