EP3C5_1 Datasheet, PDF (20/34 Pages) Altera Corporation – Cyclone III Device Data Sheet

1–20
Chapter 1: Cyclone III Device Data Sheet
Switching Characteristics
Table 1–27. Cyclone III Devices Emulated RSDS_E_1R Transmitter Timing Specifications (Note 1) (Part 2 of 2)
Symbol
Modes
C6
C7, I7
C8, A7
Unit
Min Typ Max Min Typ Max Min Typ Max
20 – 80%,
t_RISE
CLOAD = 5 pF
— 500 —
— 500 — — 500 —
ps
20 – 80%,
t_FALL
CLOAD = 5 pF
— 500 —
— 500 — — 500 —
ps
tLOCK (2)
—
—
—
1
——
1
—— 1
ms
Notes to Table 1–27:
(1) Emulated RSDS_E_1R transmitter is supported at the output pin of all I/O banks.
(2) tLOCK is the time required for the PLL to lock from the end of device configuration.
Table 1–28. Cyclone III Devices Mini-LVDS Transmitter Timing Specifications (Note 1), (2)
Symbol
Modes
C6
C7, I7
C8, A7
Unit
Min Typ Max Min Typ Max Min Typ Max
×10
10
— 200 10 — 155.5 10
— 155.5 MHz
×8
10
— 200 10 — 155.5 10
— 155.5 MHz
f_HSCLK (input
×7
10
— 200 10 — 155.5 10
— 155.5 MHz
clock
frequency)
×4
10
— 200 10 — 155.5 10
— 155.5 MHz
×2
10
— 200 10 — 155.5 10
— 155.5 MHz
×1
10
— 400 10 — 311 10
— 311
MHz
×10
100 — 400 100 — 311 100 — 311 Mbps
×8
Device
×7
operation in
Mbps
×4
×2
80
— 400 80 — 311 80
— 311 Mbps
70
— 400 70 — 311 70
— 311 Mbps
40
— 400 40 — 311 40
— 311 Mbps
20
— 400 20 — 311 20
— 311 Mbps
×1
10
— 400 10 — 311 10
— 311 Mbps
tDUTY
TCCS
—
45
— 55
45 — 55
45
— 55
%
—
—
— 200 — — 200 —
— 200
ps
Output jitter
(peak to
—
peak)
—
— 500 — — 500 —
— 550
ps
t_RISE
t_FALL
tLOCK (3)
20 – 80%,
CLOAD = 5 pF
20 – 80%,
CLOAD = 5 pF
—
— 500 — — 500 — — 500 —
ps
— 500 — — 500 — — 500 —
ps
— —1
——1
—
—
1
ms
Notes to Table 1–28:
(1) Applicable for true and emulated mini-LVDS transmitter.
(2) True mini-LVDS transmitter is only supported at the output pin of Row I/O (Banks 1, 2, 5, and 6). Emulated mini-LVDS transmitter is supported
at the output pin of all I/O banks.
(3) tLOCK is the time required for the PLL to lock from the end of device configuration.
Cyclone III Device Handbook, Volume 2
© January 2010 Altera Corporation