EP3C5_1 Datasheet, PDF (15/34 Pages) Altera Corporation – Cyclone III Device Data Sheet

Chapter 1: Cyclone III Device Data Sheet
1–15
Switching Characteristics
Switching Characteristics
This section provides the performance characteristics of the core and periphery blocks
for Cyclone III devices. All data is final and is based on actual silicon characterization
and testing. These numbers reflect the actual performance of the device under
worst-case silicon process, voltage, and junction temperature conditions.
Core Performance Specifications
Clock Tree Specifications
Table 1–19 lists the clock tree specifications for Cyclone III devices.
Table 1–19. Cyclone III Devices Clock Tree Performance
Performance
Device
Unit
C6
C7
C8
EP3C5
500
437.5
402
MHz
EP3C10
500
437.5
402
MHz
EP3C16
500
437.5
402
MHz
EP3C25
500
437.5
402
MHz
EP3C40
500
437.5
402
MHz
EP3C55
500
437.5
402
MHz
EP3C80
500
437.5
402
MHz
EP3C120
(1)
437.5
402
MHz
Note to Table 1–19:
(1) EP3C120 offered in C7, C8, and I7 grades only.
PLL Specifications
Table 1–20 describes the PLL specifications for Cyclone III devices when operating in
the commercial junction temperature range (0°C to 85°C), the industrial junction
temperature range (–40°C to 100°C), and the automotive junction temperature range
(–40°Cto 125°C). For more information about PLL block, refer to “PLL Block” in
“Glossary” on page 1–27.
Table 1–20. Cyclone III Devices PLL Specifications (Note 1) (Part 1 of 2)
f_IN (2)
fINPF D
fVCO (3)
fINDUTY
Symbol
t (4) INJITTER_CCJ
fOUT_EXT (external clock output)
(2)
Parameter
Input clock frequency
PFD input frequency
PLL internal VCO operating range
Input clock duty cycle
Input clock cycle-to-cycle jitter
F_REF ≥ 100 MHz
F_REF < 100 MHz
PLL output frequency
Min Typ Max
Unit
5
— 472.5
MHz
5
—
325
MHz
600
— 1300
MHz
40
—
60
%
—
—
0.15
UI
—
— ±750
ps
—
— 472.5
MHz
© January 2010 Altera Corporation
Cyclone III Device Handbook, Volume 2