EP3C5_1 Datasheet, PDF (17/34 Pages) Altera Corporation – Cyclone III Device Data Sheet

Chapter 1: Cyclone III Device Data Sheet
1–17
Switching Characteristics
Embedded Multiplier Specifications
Table 1–21 describes the embedded multiplier specifications for Cyclone III devices.
Table 1–21. Cyclone III Devices Embedded Multiplier Specifications
Mode
9 × 9-bit
multiplier
18 × 18-bit
multiplier
Resources Used
Performance
Unit
Number of Multipliers
C6
C7, I7, A7
C8
1
340
300
260
MHz
1
287
250
200
MHz
Memory Block Specifications
Table 1–22 describes the M9K memory block specifications for Cyclone III devices.
Table 1–22. Cyclone III Devices Memory Block Performance Specifications
Memory
Mode
Resources Used
Performance
LEs
M9K
Memory
C6
C7, I7, A7
C8
Unit
FIFO 256 × 36
47
1
315
274
238
MHz
Single-port 256 × 36
0
1
315
274
238
MHz
M9K Block
Simple dual-port 256 × 36 CLK
0
1
315
274
238
MHz
True dual port 512 × 18 single CLK 0
1
315
274
238
MHz
Configuration and JTAG Specifications
Table 1–23 lists the configuration mode specifications for Cyclone III devices.
Table 1–23. Cyclone III Devices Configuration Mode Specifications
Programming Mode
DCLK F_max
Unit
Passive Serial (PS)
133
MHz
Fast Passive Parallel (FPP) (1)
100
MHz
Note to Table 1–23:
(1) EP3C40 and smaller density members support 133 MHz.
Table 1–24 lists the active configuration mode specifications for Cyclone III devices.
Table 1–24. Cyclone III Devices Active Configuration Mode Specifications
Programming Mode
DCLK Range
Unit
Active Parallel (AP)
20 – 40
MHz
Active Serial (AS)
20 – 40
MHz
© January 2010 Altera Corporation
Cyclone III Device Handbook, Volume 2