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1GB-AUTO-AS4C128M8D3 Datasheet, PDF (28/84 Pages) Alliance Semiconductor Corporation – Fully synchronous operation
1Gb Auto-AS4C128M8D3
tDAL(min)
tMPRR
tRRD
tFAW
tIS(base)
tIH(base)
tIPW
tZQinit
tZQoper
tZQCS
tXPR
tXS
tXSDLL
tCKESR
tCKSRE
tCKSRX
tXP
tXPDLL
tCKE
tCPDED
tPD
tACTPDEN
tPRPDEN
tRDPDEN
tWRPDEN
tWRAPDEN
Auto precharge write recovery + prechargetime
WR + tRP
Multi-Purpose Register Recovery Time
ACTIVE to ACTIVE command period
Four activate window
1
-
max (4tCK,
6ns)
-
30
-
Command and Address setup time to CK, AC175
45
-
CK# referenced to Vih(ac) / Vil(ac) levels
AC150
170
-
Command and Address hold time from
CK, CK# referenced to Vih(dc) / Vil(dc)
DC100
120
-
levels
Control and Address Input pulse width for each input
560
-
Power-up and RESET calibration time
512
-
Normal operation Full calibration time
256
-
Normal operation Short calibration time
64
-
Exit Reset from CKE HIGH to a valid command
Exit Self Refresh to commands not
requiring a locked DLL
max (5tCK,
tRFC(min) +
-
10ns)
max (5tCK,
tRFC(min) +
-
10ns)
Exit Self Refresh to commands requiring a
locked DLL
tDLLK (min)
-
Minimum CKE low width for Self Refresh
entry to exit timing
tCKE (min) +
1tCK
-
Valid Clock Requirement after Self Refresh Entry (SRE) max(5tCK,
or Power-Down Entry (PDE)
10 ns)
-
Valid Clock Requirement before Self Refresh Exit (SRX) max (5tCK,
or Power-Down Exit (PDX) or Reset Exit
10 ns)
-
Exit Power Down with DLL on to any valid command;
Exit Precharge Power Down with DLL frozen to
max (3tCK,
6 ns)
-
commands not requiring a locked DLL
Exit Precharge Power Down with DLL
frozen to commands requiring a lockedDLL
max (10tCK,
24 ns)
-
CKE minimum pulse width
max (3tCK,
5 ns)
-
Command pass disable delay
2
-
Power Down Entry to Exit Timing
Timing of ACT command to Power Down
entry
Timing of PRE or PREA command to
Power Down entry
Timing of RD/RDA command to Power
Down entry
Timing of WR command to Power Down
entry (BL8OTF, BL8MRS, BC4OTF)
tCKE (min)
1
9 * tREFI
-
1
-
RL + 4 + 1
-
WL + 4 +
(tWR / tCK)
-
Timing of WRA command to Power
Down entry (BL8OTF, BL8MRS,BC4OTF)
WL + 4 +
WR + 1
-
tCK
tCK
22
tCK
ns
ps 16
ps 16,27
ps 16
ps 28
tCK
tCK
tCK
23
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
2
tCK
tCK
15
tCK
20
tCK
20
tCK
tCK
9
tCK
10
tWRPDEN
Timing of WR command to Power Down entry
(BC4MRS)
WL + 2 +
(tWR / tCK)
-
tCK
9
tWRAPDEN
tREFPDEN
tMRSPDEN
ODTLon
ODTLoff
ODTH4
ODTH8
tAONPD
Timing of WRA command to Power Down entry
(BC4MRS)
Timing of REF command to Power Down entry
Timing of MRS command to Power Down entry
ODT turn on Latency
ODT turn off Latency
ODT high time without write command or
with write command and BC4
ODT high time with Write command and BL8
Asynchronous RTT turn-on delay (Power- Down with
DLL frozen)
WL + 2 +
WR + 1
-
tCK
10
1
-
tCK 20, 21
tMOD (min)
-
WL - 2 = CWL + AL - 2
tCK
WL - 2 = CWL + AL - 2
4
-
tCK
6
-
tCK
2
8.5
ns
Confidential
-28-
Rev.1.0 May 2015