AK8157A Datasheet, PDF (9/26 Pages) Asahi Kasei Microsystems – Multiclock Generator for Premium Audio Device

[AK8157A]
■ Switching Characteristics
(Ta=25C; VDD1-4 = 1.7  2.0V; unless otherwise specified.)
Parameter
Control Interface Timing (I²C Bus mode):
Symbol
SCL Clock Frequency
fSCL
Bus Free Time Between Transmissions
tBUF
Start Condition Hold Time (prior to first clock pulse)
tHD:STA
Clock Low Time
tLOW
Clock High Time
tHIGH
Setup Time for Repeated Start Condition
tSU:STA
SDA Hold Time from SCL Falling
(Note 11)
tHD:DAT
SDA Setup Time from SCL Rising
tSU:DAT
Rise Time of Both SDA and SCL Lines
tR
Fall Time of Both SDA and SCL Lines
tF
Setup Time for Stop Condition
tSU:STO
Pulse Width of Spike Noise Suppressed by Input Filter
tSP
Capacitive load on bus
Cb
Min.
-
1.3
0.6
1.3
0.6
0.6
0
0.1
-
-
0.6
0
-
Typ. Max. Unit
400 kHz
-
s
-
s
-
s
-
s
-
s
-
s
-
s
0.3 s
0.3 s
-
s
50 ns
400 pF
Reset Timing
RSTN Pulse Width
(Note 12)
tRST
150
ns
Note 11. Data must be held for sufficient time to bridge the 300 ns transition time of SCL.
Note 12. The register of the AK8157A can be reset by bringing the RSTN pin to “L”.
015002776-E-00
-9-
2015/03