AK8157A Datasheet, PDF (18/26 Pages) Asahi Kasei Microsystems – Multiclock Generator for Premium Audio Device

[AK8157A]
SDA
SCL
S
start condition
P
stop condition
Figure 17. Start Condition and Stop Condition
DATA
OUTPUT BY
TRANSMITTER
DATA
OUTPUT BY
RECEIVER
SCL FROM
MASTER
S
START
CONDITION
no acknowledgement
1
2
acknowledgement
8
9
Figure 18. Acknowledgement (I²C Bus)
clock pulse for
the acknowledgement
SDA
SCL
data line
stable;
data valid
change
of data
allowed
Figure 19. Bit Transfer (I²C Bus)
015002776-E-00
- 18 -
2015/03