AK8157A Datasheet, PDF (7/26 Pages) Asahi Kasei Microsystems – Multiclock Generator for Premium Audio Device

[AK8157A]
■ AC Characteristics
8. Electrical Characteristics
(Ta=25C; VDD1-4 = 1.7  2.0V; unless otherwise specified.)
Parameter
Pin
Min.
Input Clock Frequency
Input Capacitance
CLKIN
-
CLKIN
-
Output Clock Frequency
MCLK
BCLK
LRCK
16.384
2.048
32
Typ.
9.6
3
-
-
-
Max.
-
-
24.576
24.576
384
Unit
MHz
pF
MHz
MHz
kHz
MCLK
Output Clock Rise / Fall Time (Note 4) BCLK
-
LRCK
6
12
ns
RMS Jitter (10Hz  5MHz)
MCLK
-
25
-
ps
MCLK
Output Clock Duty Cycle
(Note 5) BCLK
45
50
55
%
LRCK
MCLK
Output High / Low Pulse Width (Note 6) BCLK
10
-
LRCK
-
ns
Output Lock Time
MCLK
(Note 7) BCLK
-
-
1
ms
LRCK
BICK “” to LRCK Edge (tBLR) (Note 8)
(BCLK = 2.048MHz  12.288MHz)
(BCLK = 16.384MHz  24.576MHz)
BCLK
LRCK
20
10
-
-
-
ns
-
ns
LRCK Edge to BICK “” (tLRB) (Note 8)
(BCLK = 2.048MHz  12.288MHz)
(BCLK = 16.384MHz  24.576MHz)
BCLK
LRCK
20
10
-
-
-
ns
-
ns
Note 4. Rise Time = 20%VDD to 80%VDD, Fall Time = 80%VDD to 20%VDD Measured with Load
Capacitance of CL = 80pF.
Note 5. Measured with Load Capacitance of CL = 80pF.
Note 6. High Pulse Width is measured at 80%VDD Level, Low Pulse Width is measured at 20%VDD
Level, Measured with Load Capacitance of CL = 80pF.
Note 7. The time until the output settles to ±0.1% of the specified frequency from the point that the power
supply reaches VDD.
Note 8. BCLK rising edge must not occur at the same time as LRCK edge.
015002776-E-00
-7-
2015/03