AK4637EN Datasheet, PDF (72/96 Pages) Asahi Kasei Microsystems – 24bit Mono CODEC with MIC/SPK-AMP

[AK4637]
Addr
03H
Register Name
Signal Select 2
R/W
Default
D7
D6
D5
D4
D3
D2
D1
D0
SPKG1 SPKG0
0
MICL
0
0
0
MDIF
R/W
R/W
R
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
MDIF: ADC Input Source Select (Table 21)
0: AIN pin Single-ended Input (default)
1: IN+/ pins Full-differential Input
MICL: MPWR pin Output Voltage Select
0: typ 2.4V (default)
1: typ 2.0V
SPKG1-0: Speaker Amplifier Output Gain Select (Table 47)
Default: “00” (+6.4dB)
Addr
04H
Register Name
Signal Select 3
R/W
Default
D7
D6
D5
D4
D3
D2
D1
D0
LVCM1 LVCM0 DACL
0
0
0
0
0
R/W
R/W
R/W
R
R
R
R
R
0
1
0
0
0
0
0
0
DACL: Signal Switch Control from DAC to Monaural Line Amplifier
0: OFF (default)
1: ON
LVCM1-0: Monaural Line Output Gain and Common Voltage Setting (Table 50)
Default: “01” (+2dB, 1.5V)
Addr
05H
Register Name
Mode Control 1
R/W
Default
D7
PLL3
R/W
0
D6
PLL2
R/W
1
D5
PLL1
R/W
0
D4
PLL0
R/W
1
D3
D2
D1
D0
0
CKOFF BCKO1 BCKO0
R
R/W
R/W
R/W
0
0
0
0
BCKO: BICK Output Frequency Setting in Master Mode (Table 9, Table 17)
00: 16fs (default)
01: 32fs
10: 64fs
11: N/A
CKOFF: FCK, BICK, SDTO Output Stop Setting in Master Mode
0: FCK, BICK, SDTO Output (default)
1: FCK, BICK, SDTO Output Stop
PLL3-0: PLL Reference Clock Select (Table 5)
Default: “0101” (MCKI, 12.288MHz)
015010680-E-00
- 72 -
2015/09