English
Language : 

AK4637EN Datasheet, PDF (12/96 Pages) Asahi Kasei Microsystems – 24bit Mono CODEC with MIC/SPK-AMP
◁
[AK4637]
Parameter
Min.
Typ.
Max.
Unit
DAC Characteristics:
Resolution
-
-
24
Bit
Speaker-Amp Characteristics: DAC → SPP/SPN pins, ALC=OFF, IVOL=DVOL= 0dB, RL=8, BTL
Output Voltage
SPKG1-0 bits = “00”, 0.5dBFS (Po=150mW)
-
3.18
-
Vpp
SPKG1-0 bits = “01”, 0.5dBFS (Po=250mW)
3.20
4.00
4.80
Vpp
SPKG1-0 bits = “10”, 0.5dBFS (Po=400mW)
-
1.79
-
Vrms
SPKG1-0 bits = “11”, 0.5dBFS (Po=1000mW)
(AVDD=5V)
-
2.83
-
Vrms
S/(N+D)
SPKG1-0 bits = “00”, 0.5dBFS (Po=150mW)
-
80
-
dB
SPKG1-0 bits = “01”, 0.5dBFS (Po=250mW)
40
75
-
dB
SPKG1-0 bits = “10”, 0.5dBFS (Po=400mW)
-
20
-
dB
SPKG1-0 bits = “11”, 0.5dBFS (Po=1000mW)
(AVDD=5V)
-
20
-
dB
S/N (A-weighted)
SPKG1-0 bits = “01”
80
97
-
dB
Output Offset Voltage SPKG1-0 bits = “01”
-30
0
+30
mV
Load Resistance
Load Capacitance
8
-
-

-
-
100
pF
PSRR (f = 1kHz) (Note 13)
-
60
-
dB
Line Output Characteristics: DAC → AOUT pin, ALC=OFF, IVOL=DVOL= 0dB, RL=10k,
LVCM1-0 bits = “01”
LVCM0 bit = “0”
(0dBFS) AVDD=2.8V
-
2.26
-
Vpp
Output Voltage
LVCM0 bit = “1”
LVCM0 bit = “0”
(-3dBFS) AVDD=2.8V
-
1.44
1.0
-
Vrms
1.6
1.76
Vpp
LVCM0 bit = “1”
1.82
2.0
2.22
Vpp
S/(N+D)
(0dBFS)
LVCM0 bit = “0”
AVDD=2.8V
LVCM0 bit = “1”
-
-
80
-
dB
40
-
dB
(-3dBFS)
75
85
-
dB
S/N (A-weighted)
82
94
-
dB
Load Resistance
10
-
-
k
Load Capacitance
-
-
30
pF
Mono Input: BEEP pin (PMBP bit =“1”, BPVCM bit = “0”, BPLVL3-0 bits = “0000”)
Input Resistance
46
66
86
k
Maximum Input Voltage (Note 14)
-
-
1.54
Vpp
Gain
BEEP pin →
SPKG1-0 bits = “00”
+4.4
+6.4
+8.4
dB
SPP/SPN pins
SPKG1-0 bits = “01”
-
+8.4
-
dB
(Note 15)
SPKG1-0 bits = “10”
-
+11.1
-
dB
SPKG1-0 bits = “11”
-
+14.9
-
dB
BEEP pin → AOUT pin LVCM1-0 bits = “00”
-1
0
+1
dB
LVCM1-0 bits = “01”
-
+2
-
dB
LVCM1-0 bits = “10”
-
+2
-
dB
LVCM1-0 bits = “11”
-
+4
-
dB
Note 13. PSRR applied to AVDD with 500mVpp sine wave.
Note 14. The maximum value is the smaller one of AVDD Vpp or 3.3Vpp when BPVCM bit = “1”. However,
a click noise may occur when the amplitude after BEEP-Amp is 0.5Vpp or more. (Set by
BPLVL3-0 bits)
Note 15. This gain is an ideal gain when no load resistance.
015010680-E-00
- 12 -
2015/09
 ▷