AK4637EN Datasheet, PDF (31/96 Pages) Asahi Kasei Microsystems – 24bit Mono CODEC with MIC/SPK-AMP

[AK4637]
Input Frequency Sampling Frequency
Sampling Frequency
MCKI[MHz]
Mode
generated by PLL [kHz] (Note 30)
12.288
8kHz mode
8.000000
12kHz mode
Note 31
16kHz mode
16.000000
24kHz mode
Note 31
32kHz mode
32.000000
48kHz mode
Note 31
11.025kHz mode
11.025000
22.05kHz mode
22.050000
44.1kHz mode
44.100000
Sampling frequency that differs from sampling frequency of mode name
Note 30. These values are rounded off to six decimal places.
Note 31. The AK4637 must be in EXT master mode when selecting this mode.
Table 8. Sampling Frequency at PLL mode (Reference clock is MCKI) (2)
Mode BCKO1 bit BCKO0 bit BICK Output Frequency
0
0
0
16fs
(default)
1
0
1
32fs
2
1
0
64fs
3
1
1
N/A
Table 9. BICK Output Frequency at Master Mode (N/A: Not available)
■ PLL Slave Mode (PMPLL bit = “1”, M/S bit = “0”)
A reference clock of PLL is selected among the input clocks to the BICK pin. The required clock for the
AK4637 is generated by an internal PLL circuit. Input frequency is selected by PLL3-0 bits (Table 5).
The BICK and FCK inputs must be synchronized. The sampling frequency can be selected by FS3-2 bits
(Table 10).
AK4637
DSP or P
MCKI
BICK
FCK
SDTO
SDTI
16fs, 32fs, 64fs
1fs
BCLK
FCK
SDTI
SDTO
Figure 22. PLL Slave Mode (PLL Reference Clock: BICK pin)
Mode
0
1
2
Others
FS3 bit FS2 bit FS1 bit FS0 bit Sampling Frequency
0
0
x
x
8kHz ≤ fs ≤ 12kHz
0
1
x
x
12kHz < fs ≤ 24kHz
1
0
x
x
24kHz < fs ≤ 48kHz (default)
Others
N/A
Table 10. Setting of Sampling Frequency (Reference Clock = BICK pin)
(x: Do not care, N/A: Not Available)
015010680-E-00
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2015/09