AK8855 Datasheet, PDF (69/81 Pages) Asahi Kasei Microsystems – NTSC/PAL Digital Video Decoder

[ASAHI KASEI]
Control Register (R/W) [Sub Address 0x04]
Control Register
AK8855
Sub Address 0x04
bit 7
bit 6
CNTSEL
DTFIX
0
0
bit 5
ODEV
0
bit 4
bit 3
FRMRT1 FRMRT0
Default Value
0
0
bit 2
COLKIL
0
Default Value: 0x00
bit 1
bit 0
ACC
AGC
0
0
Control Register Definition
BIT
Register
Name
bit 0
AGC AGC set bit
bit 1
ACC ACC set bit
bit 2 COLKIL Color Killer Set bit
bit 3 FRMRT0
~
~
Frame Rate Set bit
bit 4 FRMRT1
bit 5 ODEV ODD Even Select bit
bit 6 DTFIX DaTa Fix control bit
bit 7 CNTSEL Contrast mode select bit
R/
W
Definition
R/
W
0 : AGC disabled ( PGA manual setting is
possible )
1 : AGC enabled
R/ 0 : ACC Disable
W 1 : ACC Enable
R/ 0 : Color Killer enabled
W 1 : Color Killer disabled
to set Frame Rate [ Frame / sec ]
FRMRT 1:0 ( 525 / 625 )
R/ 00: 30/25
W 01: 15/12.5
10: 7.5/6.25
11: Reserved
to set decode field when QVGA / CIF / QCIF
R/ decodings are made.
W 0 : to decode Odd Field
1 : to decode Even Field
to fix data in the data path while data is not
R/ output.
W 0 : OFF
1 : ON ( data in the Data path is fixed )
to set the start point of Contrast adjustment
R/
W
00 : Contrast varies, starting at Luminance level
of 128 ( gray ) as a center value.
1 : Contrast varies, starting at Luminance level
of 16 ( black ) as a center value.
MS0319-E-03
69
2004 / 11