AK8855 Datasheet, PDF (55/81 Pages) Asahi Kasei Microsystems – NTSC/PAL Digital Video Decoder

[ASAHI KASEI]
Timing Chart
QCIF (PAL)
Register Set : VLF = 1’b1, OFORM[2:0] = 3’b011, OIF[1:0] = 2’b10
AK8855
HD _H
VD _H
DVALID _H
CLKO
(6.75MHz)
D[7:0]
HD _H
CLKO
(6.75MHz)
HD _H
VD _H
DVALID _H
CLKO
(6.75MHz)
D[7:0]
0x80
32 clock @CLKO
70 clock @CLKO
0x80
0x10
Cb0
Y0
Cr0
Y1
Cb1
In case of QCIF, there is a possibility that the Low period of CLKO signal just before the HV falling edge
becomes 1.5 longer than usual case as left chart.
Even in this case, falling edge of HV and falling edge of CLKO is same timing.
Cb0
Y0
Cb87
352 clock @CLKO
Y174
Cr87
Y175
0x80
40 clock* @CLKO
*This value is not guaranteed.
Just reference value.
0x80
MS0319-E-03
55
2004 / 11