AK4490EN Datasheet, PDF (63/68 Pages) Asahi Kasei Microsystems – Premium 32-Bit 2ch DAC

[AK4490EN]
1. Grounding and Power Supply Decoupling
To minimize coupling by digital noise, decoupling capacitors should be connected to TVDD, DVDD, AVDD
and VDDL/R respectively. VDDL/R and VREFHL/R are supplied from analog supply in system, and TVDD,
DVDD and AVDD are supplied from digital supply in system. Power lines of TVDD, DVDD, AVDD and
VDDL/R and VREFHL/R should be distributed separately from the point with low impedance of regulator
etc. Digital and analog power supply should be powered up at the same time, otherwise power up the 1.8V
base power supplies (TVDD) at first, the 3.3V base power supplies secondarily (DVDD, AVDD) and 5V
base power supplies finally (VDDL/R, VREFHL/R). DVSS, AVSS, VSSL/R and VREFLL/R must be
connected to the same analog ground plane. Decoupling capacitors for high frequency should be
placed as near as possible to the supply pin.
2. Voltage Reference
The differential voltage between VREFHL/R and VREFLL/R sets the analog output range. The VREFHL/R
pin is normally connected to AVDD, and the VREFLL/R pin is normally connected to VSS1/2/3. VREFHL/R
and VREFLL/R should be connected with a 0.1µF ceramic capacitor as near as possible to the pin to
eliminate the effects of high frequency noise. No load current may be drawn from VCML/R pin. All signals,
especially clocks, should be kept away from the VREFHL/R and VREFLL/R pins in order to avoid
unwanted noise coupling into the AK4490EN.
3. Analog Outputs
The analog outputs are full differential outputs and 2.8Vpp (typ, VREFHL/R  VREFLL/R = 5V) centered
around VDDR/2 and VDDL/2 voltages. The differential outputs are summed externally, V_AOUT = (AOUT+) 
(AOUT) between AOUT+ and AOUT. If the summing gain is 1, the output range is 5.6Vpp (typ,
VREFHL/R  VREFLL/R = 5V). The bias voltage of the external summing circuit is supplied externally. The
input data format is 2's complement. The output voltage (V_AOUT) is a positive full scale for 7FFFFFFFH
(@32bit) and a negative full scale for 80000000H (@32bit). The ideal V_AOUT is 0V for 00000000H(@32bit).
The internal switched-capacitor filters attenuate the noise generated by the delta-sigma modulator beyond
the audio passband. Figure 40 shows an example of external LPF circuit summing the differential outputs
by an op-amp.
Figure 41 shows an example of differential outputs and LPF circuit example by three op-amps.
AK4490EN
AOUT-
AOUT+
1.5k
2.2n
1.5k
1.5k
1.5k
390
1n
+Vop
390
1n ^-Vop
Analog
Out
Figure 40. External LPF Circuit Example 1 for PCM (fc = 99.2kHz, Q=0.704)
015013666-E-01
- 63 -
2015/12