AK4380 Datasheet, PDF (6/21 Pages) Asahi Kasei Microsystems – 100dB 24BIT 96kHz 2CH DAC

ASAHI KASEI
[AK4380]
SWITCHING CHARACTERISTICS
(Ta = 25°C; VDD = 4.5 ∼ 5.5V; C_L = 20pF)
Parameter
Symbol
min
typ
Master Clock Frequency
Duty Cycle
fCLK
dCLK
2.048
40
11.2896
LRCK Frequency
fs
8
44.1
Duty Cycle
Duty
45
Audio Interface Timing
BICK Period
Normal Speed Mode
tBCK
1/128fs
Double Speed Mode
tBCK
1/64fs
BICK Pulse Width Low
tBCKL
70
Pulse Width High
tBCKH
70
BICK “↑” to LRCK Edge (Note 10) tBLR
40
LRCK Edge to BICK “↑” (Note 10) ^tLRB
40
SDTI Hold Time
tSDH
40
SDTI Setup Time
tSDS
40
Control Interface Timing
CCLK Period
tCCK
200
CCLK Pulse Width Low
tCCKL
80
Pulse Width High
tCCKH
80
CDTI Setup Time
tCDS
40
CDTI Hold Time
tCDH
40
CSN High Time
tCSW
150
CSN “↓” to CCLK “↑”
CCLK “↑” to CSN “↑”
tCSS
50
tCSH
50
Reset Timing
PDN Pulse Width
(Note 11) tPD
150
max
36.864
60
96
55
Notes: 10. BICK rising edge must not occur at the same time as LRCK edge.
11. The AK4380 can be reset by PDN= “L” upon power up.
If MCLK frequency or DFS changes, the AK4380 should be reset by PDN pin or RSTN bit.
Units
MHz
%
kHz
%
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MS0018-E-01
-6-
2000/8