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AK4380 Datasheet, PDF (15/21 Pages) Asahi Kasei Microsystems – 100dB 24BIT 96kHz 2CH DAC | |||
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ASAHI KASEI
[AK4380]
n Reset Function
When RSTN = â0â, the AK4380âs digital section is powered down but the internal register values are not initialized. The
analog outputs go to VCOM voltage and DZF pin goes to âHâ. Figure 7 shows the example of reset by RSTN bit.
RSTN bit
Internal
RSTN bit
3~4/fs (6)
2~3/fs (6)
Internal
State
D/A In
(Digital)
D/A Out
(Analog)
Clock In
MCLK,LRCK,BICK
DZF
Normal Operation
(1)
GD
Digital Block Power-down
Normal Operation
â0â data
(3) (2)
(3)
(4)
Donât care
2/fs(5)
GD (1)
Notes:
(1) The analog output corresponding to the digital input has a group delay, GD.
(2) Analog outputs go to VCOM voltage.
(3) Click noise occurs at the edges(ââ ââ) of the internal timing of RSTN bit. This noise is output even if â0â data is
input.
(4) The external clocks (MCLK, BICK and LRCK) can be stopped in the reset mode (RSTN = âLâ).
(5) DZF pin goes to âHâ when the RSTN bit becomes to â0â, and goes to âLâ at 2/fs after RSTN bit becomes to â1â.
(6) There is a delay, 3~4/fs from RSTN bit "0" to the internal RSTN bit â0â, and 2~3/fs from RSTN bit â1â to the
internal RSTN â1â.
Figure 7. Reset sequence example
MS0018-E-01
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2000/8
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