AK4380 Datasheet, PDF (19/21 Pages) Asahi Kasei Microsystems – 100dB 24BIT 96kHz 2CH DAC

ASAHI KASEI
[AK4380]
1. Grounding and Power Supply Decoupling
VDD and VSS are supplied from analog supply and should be separated from system digital supply. Decoupling capacitor,
especially 0.1µF ceramic capacitor for high frequency should be placed as near to VDD as possible.
2. Voltage Reference
The differential Voltage between VREF and VSS pins set the analog output range. VCOM is a signal ground of this chip.
An electrolytic capacitor 10µF parallel with a 0.1µF ceramic capacitor attached to VREF and VCOM pins eliminates the
effects of high frequency noise. No load current may be drawn from VCOM pin. All signals, especially clocks, should be
kept away from VREF and VCOM pins in order to avoid unwanted coupling into the AK4380.
3. Analog Outputs
The analog outputs are also single-ended and centered around the VCOM voltage. The output signal range is typically
3.40Vpp (typ@VREF=5V). The internal switched-capacitor filter and continuous-time filter attenuate the noise generated
by the delta-sigma modulator beyond the audio passband. Therefore, any external filters are not required for typical
application. The output voltage is a positive full scale for 7FFFFFH (@24bit) and a negative full scale for 800000H
(@24bit). The ideal output is VCOM voltage for 000000H (@24bit).
DC offsets on analog outputs are eliminated by AC coupling since analog outputs have DC offsets of VCOM + a few mV.
MS0018-E-01
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