AK4380 Datasheet, PDF (17/21 Pages) Asahi Kasei Microsystems – 100dB 24BIT 96kHz 2CH DAC

ASAHI KASEI
[AK4380]
n Register Map
Addr Register Name
D7
D6
D5
D4
D3
D2
D1
D0
00H Control 1
0
0
0
DIF2
DIF1 DIF0
PW
RSTN
01H Control 2
0
0
0
0
DFS DEM1 DEM0 SMUTE
Notes: For addresses from 02H to 1FH, data must not be written.
When PDN pin goes “L”, the registers are initialized to their default values.
When RSTN bit goes “0”, the only internal timing is reset and the registers are not initialized to their default values.
All data can be written to the register even if PW or RSTN bit is “0”.
n Register Definitions
Addr Register Name
D7
D6
D5
D4
D3
D2
D1
D0
00H Control 1
0
0
0
DIF2
DIF1 DIF0
PW
RSTN
default
0
0
0
0
1
1
1
1
RSTN: Internal timing reset control
0: Reset. All registers are not initialized.
1: Normal Operation
When MCLK frequency or DFS changes, the AK4380 should be reset by PDN pin or RSTN bit.
PW: Power down control
0: Power down. All registers are not initialized.
1: Normal Operation
DIF2-0: Audio data interface formats (see Table 4)
Initial: “011”, Mode 3
Addr Register Name
D7
D6
D5
D4
01H Control 2
0
0
0
0
default
0
0
0
0
SMUTE: Soft Mute Enable
0: Normal operation
1: DAC outputs soft-muted
DEM1-0: De-emphasis Response Control (see Table 6)
Initial: “01”, OFF
DFS: Sampling Speed Control (see Table 1)
0: Normal speed, 8kHz~48kHz
1: Double speed, 8kHz~96kHz
D3
D2
D1
D0
DFS DEM1 DEM0 SMUTE
0
0
1
0
MS0018-E-01
- 17 -
2000/8