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AK4380 Datasheet, PDF (13/21 Pages) Asahi Kasei Microsystems – 100dB 24BIT 96kHz 2CH DAC | |||
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ASAHI KASEI
[AK4380]
n Zero detection
When the input data at both channels is continuously zeros for 8192 LRCK cycles, DZF pin goes to âHâ. DZF pin channel
immediately goes to âLâ if the input data is not zero after going DZF âHâ. If RSTN bit is â0â, DZF pin goes to âHâ. DZF
pin goes to âLâ at 4~5/fs after RSTN bit returns to â1â.
n Soft mute operation
Soft mute operation is performed at digital domain. When the SMUTE pin goes to âHâ, the output signal is attenuated by
-â during 1024 LRCK cycles. When the SMUTE pin is returned to âLâ, the mute is cancelled and the output attenuation
gradually changes to 0dB during 1024 LRCK cycles. If the soft mute is cancelled within 1024 LRCK cycles after starting
the operation, the attenuation is discontinued and returned to 0dB. The soft mute is effective for changing the signal source
without stopping the signal transmission.
SMUTE pin
0dB
Attenuation
1024/fs
(1)
1024/fs
(3)
-â
GD
GD
(2)
AOUT
DZF pin
(4)
8192/fs
Notes:
(1) The output signal is attenuated by -â during 1024 LRCK cycles (1024/fs).
(2) The analog output corresponding to the digital input has a group delay, GD.
(3) If the soft mute is cancelled within 1024 LRCK cycles, the attenuation is discontinued and returned to 0dB.
(4) When the input data at both channels is continuously zeros for 8192 LRCK cycles, DZF pin goes to âHâ. DZF pin
immediately goes to âLâ if the input data is not zero after going DZF âHâ.
Figure 5. Soft mute and zero detection
MS0018-E-01
- 13 -
2000/8
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