AK4392 Datasheet, PDF (26/41 Pages) Asahi Kasei Microsystems – High Performance 120dB Premium 32-Bit DAC

[AK4392]
■ Soft Mute Operation
The soft mute operation is performed at digital domain. When the SMUTE pin goes to “H” or the SMUTE bit set to “1”,
the output signal is attenuated by −∞ during ATT_DATA × ATT transition time from the current ATT level. When the
SMUTE pin is returned to “L” or the SMUTE bit is returned to “0”, the mute is cancelled and the output attenuation
gradually changes to the ATT level during ATT_DATA × ATT transition time. If the soft mute is cancelled before
attenuating −∞ after starting the operation, the attenuation is discontinued and returned to ATT level by the same cycle.
The soft mute is effective for changing the signal source without stopping the signal transmission.
SM UTE pin or
SM UTE bit
(1)
ATT_Level
A tte n u a tio n
(1)
(3)
-∞
GD
GD
(2)
(2)
AOUT
DZF pin
(4)
8192/fs
Notes:
(1) ATT_DATA × ATT transition time. For example, this time is 1020LRCK cycles (1020/fs) at ATT_DATA=255 in
Normal Speed Mode.
(2) The analog output corresponding to the digital input has group delay (GD).
(3) If the soft mute is cancelled before attenuating −∞ after starting the operation, the attenuation is discontinued
and returned to ATT level by the same cycle.
(4) When the input data for each channel is continuously zeros for 8192 LRCK cycles, the DZF pin for each channel
goes to “H”. The DZF pin immediately returns to “L” if input data are not zero.
Figure 12. Soft Mute Function
■ System Reset
The AK4392 should be reset once by bringing the PDN pin = “L” upon power-up. It initializes register settings of the
device. The AK4392 exits this system reset (power-down mode) by MCLK and LRCK after the PDN pin = “H”, and the
analog block exits power-down mode. The digital block exits power-down mode after the internal counter counts MCLK
for 4/fs.
MS1045-E-02
- 26 -
2009/04