TMXF28155 Datasheet, PDF (571/606 Pages) Agere Systems – TMXF28155 Super Mapper 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1

Preliminary Data Sheet
May 2001
TMXF28155/51 Super Mapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
23 Digital Jitter Attenuation Controller Functional Description (continued)
23.1 Introduction
This section describes the functions of the digital jitter attenuator (DJA) controller used in the Super Mapper device.
The DJA controller contains 28 DJA blocks. Each DJA block can operate in two different modes, as a DS1 or an E1
jitter attenuator. In both modes, the DJA blocks can be provisioned to operate as a second-order PLL always, or it
can switch to act as a first-order PLL during VT pointer adjustments to help meet MTIE requirements. The block will
also insert the proper AIS signal if the primary block AIS control input is active. The PLL bandwidth can be set over
a wide range to accommodate a number of different system constraints.
23.2 Features
s The DJA block accepts/delivers DS1/E1 clock, data, and AIS indications from/to the cross connect block.
s AIS in will cause the correct AIS clock to be inserted, and the AIS indication will be passed back to the cross con-
nect.
s The DJA blocks operate in the second-order PLL mode under normal conditions. The DJA blocks can be provi-
sioned to enter the first-order PLL mode following VT level pointer adjustments. The period of time in the first-
order mode is provisionable via registers.
s The PLL bandwidth is provisionable between 0.1 Hz and 0.5 Hz. The damping factor for these bandwidths varies
between 2 and 0.5.
Figure 98 shows the DJA block with I/O connections to other blocks within the Super Mapper device.
MICRO INTERFACE
E1_XCLK
DS1_XCLK
CONTROL
D IG IT A L
JITTER
ATTENUATOR
XC _JD ATA[28:1]
X C _ JC L K [28 :1 ]
X C _ JP T R A D J [28 :1 ]
X C _ JA IS [2 8:1 ]
D JA _ C L K [28 :1 ]
D JA_D ATA[28:1]
D S 1_ A IS C LK
E1_AISCLK
CROSS
CONNECT
Figure 98. DJA Block with I/O Connections to Other Blocks in the Device
5-8955(F)r.3
Agere Systems Inc.
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