TMXF28155 Datasheet, PDF (105/606 Pages) Agere Systems – TMXF28155 Super Mapper 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1

Preliminary Data Sheet
May 2001
TMXF28155/51 Super Mapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
8 TMUX Registers (continued)
Table 108. TMUX_THS_POH[1—3]_CTL, Transmit High-Speed Control Parameters (R/W)
Address Bit
Name
Function
Reset
Default
0x40036 15:9
—
Reserved.
0x00
8 TMUX_THSPREIINH1 Transmit Path REI Inhibit for Port 1. Control bit, when set to 0
a logic 1, disables hardware insertion of path REI (B3 errors)
in the outgoing STM-1 (AU-4) frame G1 byte; a logic 0
enables hardware insertion of path REI. Only port 1 control is
valid in AU-4 mode.
7 TMUX_TPOHTHRU1 Transmit High-speed Path Overhead Insertion from Low- 0
speed Input (Telecom Bus). Control bit, when set to a logic
1, causes all path overhead bytes, and H1, H2, and H3, to be
passed through from the low-speed telecom bus to the high-
speed output signal. Only port 1 control is valid in AU-4 mode.
6 TMUX_THSN1INS1 Transmit N1 Insert (Control) for Port 1. Control bit, when
0
set to a logic 1, inserts the value in TMUX_TN1INS1[7:0]
(Table 114) into the outgoing N1 byte in the STS-3/STM-1
(AU-4) frame; a logic 0 allows insertion from the TPOAC chan-
nel or a default value. Only port 1 control is valid in AU-4
mode.
5 TMUX_THSK3INS1 Transmit K3 Insert (Control) for Port 1. Control bit, when
0
set to a logic 1, inserts the value in TMUX_TK3INS1[7:0]
(Table 114) into the outgoing K3 byte in the STS-3/STM-1
(AU-4) frame; a logic 0 allows insertion from the TPOAC chan-
nel or a default value. Only port 1 control is valid in AU-4
mode.
4 TMUX_THSF3INS1 Transmit F3 Insert (Control) for Port 1. Control bit, when set 0
to a logic 1, inserts the value in TMUX_TF3INS1[7:0]
(Table 114) into the outgoing F3 byte in the STS-3/STM-1
(AU-4) frame; a logic 0 allows insertion from the TPOAC chan-
nel or a default value. Only port 1 control is valid in AU-4
mode.
3 TMUX_THSF2INS1 Transmit F2 Insert (Control) for Port 1. Control bit, when set 0
to a logic 1, inserts the value in TMUX_TF2INS1[7:0]
(Table 114) into the outgoing F2 byte in the STS-3/STM-1
(AU-4) frame; a logic 0 allows insertion from the TPOAC chan-
nel or a default value. Only port 1 control is valid in AU-4
mode.
2 TMUX_THSRDIPINS1 Transmit Path RDI Insert (Control) for Port 1. Control bit,
0
when set to a logic 1, inserts the value in
TMUX_TRDIPINS1[2:0] (Table 114) into the outgoing G1[3:1]
bits in the STS-3/STM-1 (AU-4) frame; a logic 0 allows inser-
tion from the TPOAC channel or a default value. Only port 1
control is valid in AU-4 mode.
Agere Systems Inc.
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