TMXF28155 Datasheet, PDF (213/606 Pages) Agere Systems – TMXF28155 Super Mapper 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1

Preliminary Data Sheet
May 2001
TMXF28155/51 Super Mapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
11 M13/M23 MUX/DeMUX Registers (continued)
Table 250. M13_DS1_FEAC_LB_DETD_R[1—4], DS1 Far-End Alarm and Control Loopback Detect Delta
Registers (RO)
Address Bit
0x10049 15:8
Name
—
Reserved.
Function
Reset
Default
0x00
0x10049 7
M13_DS3_FLB_DETD
—
This delta bit is set if M13_DS3_FLB_DET
0x0
(Table 251) changes state. It can be pro-
grammed to be either clear on read (COR) or
clear on write (COW), and it is not set to 1
again until another state transition occurs.
Reserved.
0x10049 6:4
—
Reserved.
000
0x1004A 15:8
—
Reserved.
0x00
0x1004B 15:8
—
Reserved.
0x1004C 15:8
0x00
0x00
0x10049 3:0
0x1004A 7:0
0x1004B 7:0
0x1004C 7:0
M13_DS1_FEAC_LB_DETD[28:25]
M13_DS1_FEAC_LB_DETD[24:17]
M13_DS1_FEAC_LB_DETD[16:9]
M13_DS1_FEAC_LB_DETD[8:1]
These individual delta bits are set as the
result of the corresponding state bits
M13_DS1_FEAC_LB_DET[28:1] (Table 251)
transitioning either from 0 to 1 or from 1 to 0.
Delta bits can be programmed to be either
clear on read (COR) or clear on write
(COW), and they are not set to 1 again until
the event reoccurs.
0x0
0x00
0x00
0x00
Table 251. M13_DS1_FEAC_LB_DET_R[1—4], DS1 Far-End Alarm and Control Loopback Detect Status
Registers (RO)
Address Bit
0x1004D 15:8
0x1004D 7
0x1004D 6:4
0x1004E 15:8
0x1004F 15:8
0x10050 15:8
Name
—
M13_DS3_FLB_DET
—
—
—
—
Function
Reset
Default
Reserved.
0x00
When an FEAC loopback activate codeword for
DS3 is received four consecutive times, the bit is
set high. The bit is cleared when a loopback deacti-
vate codeword is received four consecutive times.
Reserved.
Reserved.
Reserved.
0
000
0x00
0x00
Reserved.
0x00
0x1004D 3:0
0x1004E 7:0
0x1004F 7:0
0x10050 7:0
M13_DS1_FEAC_LB_DET[28:25]
M13_DS1_FEAC_LB_DET[24:17]
M13_DS1_FEAC_LB_DET[16:9]
M13_DS1_FEAC_LB_DET[8:1]
When an FEAC loopback activate codeword for
DS1 is received four consecutive times, the appro-
priate bit(s) is set high. The bit(s) is cleared when a
loopback deactivate codeword for that channel(s) is
received four consecutive times.
0x0
0x00
0x00
0x00
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