HMC701LP6CE Datasheet, PDF (11/40 Pages) Hittite Microwave Corporation – 8 GHz 16-Bit Fractional-N Synthesizer

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HMC701LP6CE
8 GHz 16-BIT FRACTIONAL-N PLL
Figure 5. RF Input Stage
RF Path ’N’ Divider
The main RF path divider is capable of average divide ratios between 65,531 and 36 in fractional mode, and 65,535
to 32 in integer mode. The reason for the difference between integer and fractional modes is that the fractional divider
actually divides by up to ±4 from the average divide number. Actual division ratios when used with a given VCO will
depend upon the reference frequency used and the desired output band.
General Purpose Output (GPO) Interface
The HMC701LP6CE features a 3-wire General Purpose Output (GPO) interface. GPO registers are described in
Reg1Bh Table 37. The GPO is a flexible interface that supports a number of different functions and real time waveform
access including:
a. General Data Output from SPI register gpo_sel_0_
data (gpo_sel=0)
e. Internal synchronized frac strobe with clocks
(gposel=4)
b. Prescaler & reference path outputs (gpo_sel=1)
f. Δ∑ Modulator Phase Accumulator (gposel=6)
c. Lock Detect Windows (gpo_sel=2)
g. Auxiliary oscillators (gposel=7)
d. Anti-cycle Slip waveforms (gpo_sel=3)
h. Δ∑ Modulator Outputs (gposel=10)
General Data to GPO (gpo_sel=0)
Setting register gpo_sel=0 in Table 37 assigns the 3-bit data from register gpo_sel_0_data Reg1B<6:4> to the GPO
bus.
Prescaler and Reference Path Outputs (gpo_sel = 1)
Setting register gpo_sel=1 (Reg1B<3:0> Table 37) results in the input crystal being buffered out to GPO3 as shown
in Figure 6. This is useful for example to generate a copy of the input crystal signal to drive other circuits in the
application, while at the same time isolating the noisy circuits from the sensitive crystal output. Often only the
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